bufpi_test.c
1.82 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
#include "pi_util.h"
// Upper bits are only used in atb part of buffer
#define TEST_UPPER_BITS 0
void pibWrite(u32 wordLow,u32 bits9,u32 addrOffset);
void pibRead(u32 *wordLow,u32 *bits9,u32 addrOffset);
/*
addrOffset is offset into PI buffer RAM. So, the
actual address is PI_BUFFER_BASE_REG+addrOffset. addrOffset
must be 4 byte aligned.
wordLow is 4 byte word to be written to address specified
by addrOffset.
bits9 holds upper 9 bits of entry at addrOffset
in its LSBs.
*/
void pibWrite(u32 wordLow,u32 bits9,u32 addrOffset)
{
IO_WRITE(PI_ATBU_REG,bits9);
IO_WRITE(PI_BUFFER_BASE_REG+addrOffset,wordLow);
}
void pibRead(u32 *wordLow,u32 *bits9,u32 addrOffset)
{
u32 addrAligned;
*wordLow = IO_READ(PI_BUFFER_BASE_REG+addrOffset);
if (!TEST_UPPER_BITS)
return;
/* access to the upper bit of two consecutive entries
* is done with a single read. So, the reads to the
* PI_BUF_ATBU_READ space must be 8-byte aligned.
*/
*bits9 = IO_READ(PI_ATB_BUFFER_HI_REG+(addrOffset&~7));
if(!(addrOffset&4)){
*bits9 = (*bits9)>>16;
}
*bits9 &= 0x1ff;
}
/*
* Test the non-ATB portion of the buffer here. The ATB portion
* will be tested separately using the upper 9 bits as well.
*/
int piBufIoTest()
{
int i,result=PASS;
u8 inData[PI_ATB_BUFFER_OFFSET],checkData[PI_ATB_BUFFER_OFFSET];
_TRACE(DLOG,fprintf(LogFp,"Starting test piBufIo\n"));
for(i=0;i<PI_ATB_BUFFER_OFFSET;i++){
inData[i] = rand();
}
ioWriteBuffer(inData,PI_ATB_BUFFER_OFFSET,PI_BUFFER_BASE_REG);
ioReadBuffer(checkData,PI_ATB_BUFFER_OFFSET,PI_BUFFER_BASE_REG);
for(i=0;i<PI_ATB_BUFFER_OFFSET;i++){
if(inData[i]!=checkData[i]){
result = FAIL;
break;
}
}
printf("piBufIo: ");
OUTPUT_TEST_PASSFAIL(result);
return result;
}