vi_scalew-1.tst
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//****************************************************************************
//
// File: vi_scalew-1.tst
// Test file for Video Interface (VI)
// register configuration data for a 320x32 interlaced backend test
//
//
// File Format:
//
// t <id> <arg1> <arg2> <arg3> <arg4> - Run test id with the 4 args
// where id = decimal number
// argX = hex number
// q - Quit testing and shutdown verilog
// server
//
// Kluster
// 01-7-95
//
//
//****************************************************************************
//****************************************************************************
// Configure RDRAM
k 1
vi_snoop 1
//t 0200 00000000 00000000 00000000 00000000
dr 2 tmp.rdram
// Do a mem dump to make sure rdram was loaded correctly
t 0106 00001000 00000002 00000000 00000000
t 0106 00001555 00000002 00000000 00000000
t 0106 00001aaa 00000002 00000000 00000000
t 0106 00001fff 00000002 00000000 00000000
// Read VI_CTRL, make sure is zeroed out
t 0103 04400000 00000000 00000000 00000000
// Write-Read VI_ORIGIN
t 0103 04400004 00001000 00001000 00000000
// Write-Read VI_WIDTH
t 0103 04400008 00000140 00000140 00000000
// Write-Read VI_V_INT
t 0103 0440000c 000003ff 000003ff 00000000
// Write-Read VI_BURST
t 0103 04400014 00820404 00820404 00000000
// Write-Read VI_V_SYNC
t 0103 04400018 00000028 00000028 00000000
// Write-Read VI_H_SYNC
t 0103 0440001c 00000600 00000600 00000000
// Write-Read VI_LEAP
t 0103 04400020 06000600 06000600 00000000
// Write-Read VI_H_START
t 0103 04400024 00200160 00200160 00000000
// Write-Read VI_V_START
t 0103 04400028 00050025 00050025 00000000
// Write-Read VI_V_BURST
t 0103 0440002c 00050025 00050025 00000000
// Write-Read VI_X_SCALE
t 0103 04400030 00000080 00000080 00000000
// Write-Read VI_Y_SCALE
t 0103 04400034 00000100 00000100 00000000
// Write-Read VI_CTRL
t 0103 04400000 0000315b 0000315b 00000000
// Write VI_V_CURRENT
t 0102 04400010 00000000 00000000 00000000
// Read VI_V_CURRENT
t 0100 04400010 00000000 00000000 00000000
// Loop until we hit line number 026
t 0107 04400010 ffffffff 00000026 00000000
// Now start second field
// Write-Read VI_V_START
t 0103 04400028 00070027 00070027 00000000
// Write-Read VI_V_BURST
t 0103 0440002c 00070027 00070027 00000000
// Loop until we hit line number 027
t 0107 04400010 ffffffff 00000027 00000000
// Write VI_V_CURRENT
t 0102 04400010 00000000 00000000 00000000
// Read VI_V_CURRENT
t 0100 04400010 00000000 00000000 00000000
//****************************************************************************
// QUIT
//****************************************************************************
vi_tab tmp.tab
dw 2 tmp.rdram
k 0
//q