/*
 * Copyright 1995, Silicon Graphics, Inc.
 * ALL RIGHTS RESERVED
 *
 * UNPUBLISHED -- Rights reserved under the copyright laws of the United
 * States.   Use of a copyright notice is precautionary only and does not
 * imply publication or disclosure.
 *
 * U.S. GOVERNMENT RESTRICTED RIGHTS LEGEND:
 * Use, duplication or disclosure by the Government is subject to restrictions
 * as set forth in FAR 52.227.19(c)(2) or subparagraph (c)(1)(ii) of the Rights
 * in Technical Data and Computer Software clause at DFARS 252.227-7013 and/or
 * in similar or successor clauses in the FAR, or the DOD or NASA FAR
 * Supplement.  Contractor/manufacturer is Silicon Graphics, Inc.,
 * 2011 N. Shoreline Blvd. Mountain View, CA 94039-7311.
 *
 * THE CONTENT OF THIS WORK CONTAINS CONFIDENTIAL AND PROPRIETARY
 * INFORMATION OF SILICON GRAPHICS, INC. ANY DUPLICATION, MODIFICATION,
 * DISTRIBUTION, OR DISCLOSURE IN ANY FORM, IN WHOLE, OR IN PART, IS STRICTLY
 * PROHIBITED WITHOUT THE PRIOR EXPRESS WRITTEN PERMISSION OF SILICON
 * GRAPHICS, INC.
 *
 */

/*
 * File:		gsmain.s
 * Creator:		hsa@sgi.com
 * Create Date:		Tue Feb 20 10:31:00 PST 1996
 *
 * THIS IS THE SPRITE2D version!
 *
 * This is the 'graphics task' for the RSP. it takes blocks of display
 * list commands and interprets them:	 transforming, shading, clipping,
 * DDA setup, etc., preparing geometry to be rasterized. It is also the
 * center of the graphics system from the game's point of view, and
 * receives all of the RDP control commands, which it passes along.
 *
 * In the absence of a linker, the different source code modules of the
 * graphics task will be include'd here during compilation. See the Makefile
 * for details.
 *
 */


#include <rsp.h>
#include <rcp.h>
#include <os.h>
#include <sptask.h>
#include "mbi.h"

		.text	TASKBASE	# this is coordinated with rspboot.s
		.data	0
	
#define MAIN
#include "../gdmem.h"
#include "../gfx_regs.h"

		.text

	#################################################################
	#
	#  Begin task initialization
	#
	#  Register $1 holds the task header address
	# format for the task header:
	#
	# (see task.h)
	#

	# set state pointer:
		addi	rsp_state, zero, RSP_STATE_OFFSET

#include "../ginit.s"
	
		.ent	main

	#################################################################
	#
	# Note about display list command processing:	
	#
	#    - 'inp' always points to the "next" DL command in DRAM. This
	# 	is the pointer pushed on the stack and used to retrieve the
	#	next block of DL commands.
	#
	#    - 'dinp' is the local pointer in DMEM to the part of the display
	#	list in DMEM.
	#
	#    - 'dlcount' parallels dinp, counting down the remaining DL
	#	commands in DMEM.
	#
	# So when (dlcount == 0) we need to fetch more display list.
	#
	# NOTE:
	# It would be useful to support an "immediate" mode from the host.
	# This would allow a better performance/space trade-off using 
	# generated data, etc. In order to do this we need to modify the
	# display list processing -- basically allow the gtask to go idle
	# and wait for more display list, rather than exit. Needs a couple
	# status registers to sync with the host (GO, IDLE, etc.)
	#
	# Fri Oct  7 10:45:04 PDT 1994
	#
	#################################################################
	#
	#
DMAWaitDL:
		jal	DMAwait
		# note delay slot...		
	
 	# process gfx list:	
.name	dlcmd,	$1
		addi	dinp, zero, RSP_DLINPUT_OFFSET	# delay
DecodeDL:	lw	gfx0, 0(dinp)
		lw	gfx1, 4(dinp)
		srl	dlcmd, gfx0, 29
		andi	dlcmd, dlcmd, 0x06	# GFX op type (jump offset)

	# advance these pointers after consuming gfx0/1
		addi	inp, inp, 8
		addi	dinp, dinp, 8
		addi	dlcount, dlcount, -8
	
	#
	# Get a head start on the next command, if it's a DMA.
	# The register in_bufp points to the fetched data, and
	# should implment the double-buffering...
	#
.name dma_len,	$18
.name dram_addr, $19
.name dmem_addr, $20
		bgtz	dlcmd, ContDecode	# not a DMA...
		# note delay slot	
	#
	# despite being a 16-bit field, the maximum DMA transfer
	# is 256 bytes (16 vertices). Since the G_DL command will
	# also come through here, with a much larger DMA length, we
	# protect the length by masking to 0x01ff...
	#

	# WARNING!
	# We are passing the wrong length to the DMA routine here. 
	# We should pass 'length-1'. We choose not to spend the extra 
	# instruction and correct this, because the place in DMEM 
	# that will potentially be trashed by the extra DMA is 
	# guarenteed to be trash-able. (setup tmp area)
	#
		addi	in_bufp, zero, RSP_INPUT_OFFSET	# delay slot
		andi	dma_len, gfx0, 0x01ff	# pick off DMA length

		jal	AddrFixup
		add	dram_addr, gfx1, zero		# delay slot

		add	dmem_addr, zero, in_bufp
		jal	DMAproc
		addi	$17, zero, 0	# delay slot
.unname dma_len
.unname dram_addr
.unname dmem_addr

	# we do the wait for the DMA in the gdma module. This
	# lets us do some useful work while we wait...
	
.name op_addr, $2
    ContDecode:		
				# compute jump address
		lh	op_addr, OPTYPE_JMP_OFFSET(dlcmd)
		jr	op_addr
	# this delay slot is the first thing the other routines do...
		srl	$2, gfx0, 23		# table byte offset...
.unname op_addr
.unname dlcmd

	

.name 	yield,		$2
.name	overeturn,	$21	# return address from loadOverlay
	
GfxDone: 	# we're done with this one, do the next one (if available)...
	#
	# stick our head up, see if we need to yield the SP. If so,
	# checkpoint everything then exit.
	#						#
		mfc0	yield, SP_STATUS		# need to yield?
		andi	yield, yield, SP_STATUS_YIELD	#
		bne	yield, zero, RSPYield		#
#if 0
		lh	overeturn, TASKYIELD(zero)    	# return to RSPYield
#endif
		nop
							#
.unname yield						#
							#
noYield:						#
 		bgtz	dlcount, DecodeDL		#
		nop					#
 ### BRANCH OCCURS to DecodeDL if dlcount is not zero yet
		j	LoadDL				#
		lh	return, DMAWAITDL(zero)		# return to DMAWaitDL
 ### BRANCH OCCURS to LoadDL: and returns to DMAWaitDL:
							#
		.end	main				#
							#
.unname overeturn

#include "../gdone.s"
	#
	#
	##################################################################

	##################################################################
	#
	# start the DMA of the display list into DMEM.
	#
	# Always reads RSP_DLINPUT_SIZE8 bytes into the buffer. We
	# require lists to be terminated with G_ENDDL, so this might be
	# reading a little beyond the actual end.
	#
	# Registers upon call:
	#		inp	pointer to read from
	#		return	where to go when we're done
	#
	# Registers upon return:
	#		dlcount	size actually read (bytes)
	#		dinp	pointer to data we read in
	#
	# Registers used:
	#		return, zero, inp, dlcount, dinp
	#

		.ent	LoadDL
LoadDL:		
 		addi	dlcount, zero, RSP_DLINPUT_SIZE8
		add	$21, zero, return
 		addi	$20, zero, RSP_DLINPUT_OFFSET
		add	$19, zero, inp
 		addi	$18, zero, RSP_DLINPUT_SIZE8 - 1
		jal	DMAproc
		addi	$17, zero, 0
		jr	$21
		addi	dinp, zero, RSP_DLINPUT_OFFSET # delay slot

		.end LoadDL
	#
	#
	##################################################################

   	##################################################################
   	#
   	# This routine loads one of the overlays from the DMEM table.
   	# Register $4 has the index into the overlay table to load.
   	#
   	# Assumes overlay table is the first thing in DMEM.
   	#
.unname	return_save
.name	overp,		$30
.name	imem_addr,	$20
.name	dram_addr,	$19
.name	dma_len,	$18
.name	iswrite,	$17
.name	overeturn,	$21
	
	loadOverlaySR:
		add	overeturn, zero, return
	loadOverlay:
		lw	dram_addr, OVERLAY_OFFSET(overp)
		lh	dma_len,   OVERLAY_SIZE(overp)
		lh	imem_addr, OVERLAY_DEST(overp)
		jal	DMAproc
		addi	iswrite, zero, 0	# delay slot
		jal	DMAwait
		nop
		jr	overeturn
		# note delay slot
.unname	overp
.unname	imem_addr
.unname	dram_addr
.unname	dma_len
.unname	iswrite
.unname	overeturn
.name	return_save,	$30
   	#
   	#
   	##################################################################
	
	##################################################################
	#
	# Address Fix-up routine.
	#
	# Takes a segment/offset address in register $19, computes
	# the proper DRAM address using the segment table. Returns
	# the answer in register $19
	#
	# (The use of register $19 is NOT random... It's the DRAM
	# address used in DMAproc, often the next thing called.)
	#
	# This code is shared among several routines, the registers
	# used are chosen not to conflict with those.
	#
.name dma_addr,	$19
.name mask, 	$11
.name seg_id,	$12
.name seg_ptr,	$13
		.ent	AddrFixup
    AddrFixup:
		lw	mask, SEGADDR_MASK_OFFSET(zero)
		srl	seg_id, dma_addr, 22
		andi	seg_id, seg_id, 0x3c	# Seg num only RWW
 #		sll	seg_id, seg_id, 2	# leave mult. by 4 for offset
		and	dma_addr, dma_addr, mask
		add	seg_ptr, zero, seg_id
		lw	seg_id, RSP_SEG_OFFSET(seg_ptr)
		jr	return
		add	dma_addr, dma_addr, seg_id	# delay slot
		.end	AddrFixup
.unname dma_addr
.unname mask
.unname seg_id
.unname seg_ptr
	#
	##################################################################
	

	##################################################################
	#
	# Procedure to do DMA reads/writes.
	#
	# Registers:
	#
	#	$20	mem_addr
	#	$19	dram_addr
	#	$18	dma_len
	#	$17	iswrite?
	#
	#	$11	used as tmp
	#
.name	mem_addr,	$20
.name	dram_addr,	$19
.name	dma_len,	$18
.name	iswrite,	$17
.name	tmp,		$11

#if 0
DMAproc:
	# request DMA access: (get semaphore)
		mfc0	tmp, SP_RESERVED
		bne	tmp, zero, DMAproc		
		# note delay slot
	# wait for not FULL:
	DMAFull:
		mfc0	tmp, DMA_FULL
		bne	tmp, zero, DMAFull
		nop
	# set DMA registers:
		mtc0	mem_addr, DMA_CACHE
	# handle writes:
		bgtz	iswrite, DMAWrite
 		mtc0	dram_addr, DMA_DRAM

		j	DMADone
		mtc0	dma_len, DMA_READ_LENGTH

	DMAWrite:
		mtc0	dma_len, DMA_WRITE_LENGTH
	DMADone:				
		jr	return
		mtc0	zero, SP_RESERVED	# delay slot
#else /* 0 */
DMAproc:
		mfc0	tmp, DMA_FULL
		bne	tmp, zero, DMAproc
		nop
	# set DMA registers:
		mtc0	mem_addr, DMA_CACHE
	# handle writes:
		bgtz	iswrite, DMAWrite
 		mtc0	dram_addr, DMA_DRAM

		jr	return
		mtc0	dma_len, DMA_READ_LENGTH

	DMAWrite:
		jr	return
		mtc0	dma_len, DMA_WRITE_LENGTH
#endif /* 0 */
.unname	mem_addr
.unname	dram_addr
.unname	dma_len
.unname	iswrite
.unname	tmp
	#
	#
	##################################################################
	
	##################################################################
	#
	# Procedure to do DMA waits.
	#
	# Registers:
	#
	#	$11	used as tmp
	#
 #.name	tmp,	$20
 #.name	tmp,	$16 !! $16 needed as clr2 in lighting
.name	tmp,	$11
	
#if 0
DMAwait:		
	# request DMA access: (get semaphore)
		mfc0	tmp, SP_RESERVED
		bne	tmp, zero, DMAwait
		# note delay slot
	WaitSpin:
		mfc0	tmp, DMA_BUSY
		bne	tmp, zero, WaitSpin
		nop
		jr	return
		mtc0	zero, SP_RESERVED	# delay slot
#else /* 0 */
DMAwait:		
		mfc0	tmp, DMA_BUSY
		bne	tmp, zero, DMAwait
		nop
		jr	return
		nop
#endif /* 0 */
.unname	tmp
	#
	#
	##################################################################
	
	##################################################################
	#
	# other "modules" are appended by #include
	#

#define YIELD_RESTART
#define YIELD_STOP
#include "../gyield.s"
#undef YIELD_STOP
#undef YIELD_RESTART
	
 #==============================================================================
 #===== Output module (either DRAM or directly to XBUS) ========================
 #==============================================================================
#ifdef OUTPUT_DRAM
#   include "../goutdram.s"
#else
#ifdef OUTPUT_FIFO
#   include "../goutfifo.s"
#else
#   include "../goutxbus.s"
#endif
#endif
	
 #==============================================================================
 #===== Command parsing modules for immediate, rdp, and dma commands ===========
 #==============================================================================
#include "../gimm.s"
	
#include "../grdp.s"
	
#include "../gdma.s"
	
	EndOfProg:
		.print	__FILE__
		.print	" : IMEM used %d instructions ", (EndOfProg - 0x04001000)/4
		.print  "(must be < 1024).\n"
		.dmax	4096
	#
	#
	##################################################################