amain.s 4.62 KB
/*************************************************************************
 *                                                                       *
 *               Copyright (C) 1994, Silicon Graphics, Inc.              *
 *                                                                       *
 *  These coded instructions, statements, and computer programs  contain *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and *
 *  are protected by Federal copyright  law.  They  may not be disclosed *
 *  to  third  parties  or copied or duplicated in any form, in whole or *
 *  in part, without the prior written consent of Silicon Graphics, Inc. *
 *                                                                       *
 ************************************************************************/
	
/* amain.s */

#include <rsp.h>
#include <rcp.h>
#include <mbi.h>
#include <os.h>
#include <sptask.h>
#include "aud_dmem.h"	
#include "ayield.h"
	
		.text	TASKBASE
		.data	(DCACHEBASE + RSP_PDATA_OFFSET)
	
#include "aud_dmem_init.h"
#include "aud_regs.h"
#include "aud_dmem_add.h"
	
 ######################################################################
 #
 # Begin task initialization
 #
 #  Register $1 holds the task header address
 # format for the task header is defined in os.h

		.ent	astart

.name tskhd,	$1
.name tmp,	$4
.name stat,	$5

		mfc0	stat, CMD_STATUS
		lw	inp, OS_TASK_OFF_DATA(tskhd)
		lw	gcount, OS_TASK_OFF_DATA_SZ(tskhd)
		andi	tmp, stat, DPC_STATUS_XBUS_DMEM_DMA
		beq	tmp, zero, noYield
		andi	tmp, stat, DPC_STATUS_DMA_BUSY
		beq	tmp, zero, noYield
		mfc0    tmp, CMD_STATUS

yieldwaitloop:	andi	tmp, tmp, 0x100
		bgtz	tmp, yieldwaitloop
		mfc0    tmp, CMD_STATUS

noYield:	addi	scrbase, zero, RSP_SCRATCH_OFFSET


.unname	tskhd
.unname	tmp
.unname	stat

		.end	astart

 ######################################################################
 #
 # get the display list and decode it.

		.ent	amain

		jal	LoadDL
		add	$2, zero, inp
	
		mfc0	$2, DMA_BUSY
DMAWaitDL:	bne	$2, zero, DMAWaitDL
		mfc0	$2, DMA_BUSY
		
		mtc0	$0, SP_RESERVED

 ###################
 #
 # decode.
	
.name op_addr,	$1

DecodeDL:	lw	aud0, 0(dinp)
		lw	aud1, 4(dinp)
		addi    inp, inp, 8
		srl	op_addr, aud0, 23
		andi	op_addr, op_addr, 0xfe
		lh	op_addr, OPTYPE_JMP_OFFSET(op_addr)
		jr	op_addr
		addi	gcount, gcount, -8
		break

.unname op_addr

 ###################
 #
 # done.

AudDone: 	bgtz	dlcount, DecodeDL
		addi	dinp, dinp, 8
	
DoneTest:	blez	gcount, TaskDone
		ori	$1, zero, SP_SET_TASKDONE
		jal	LoadDL
		add	$2, zero, inp

		j	DMAWaitDL
		mfc0	$2, DMA_BUSY

		.end	amain

TaskDone:	mtc0	$1, SP_STATUS
		break
		nop

MainWait:	beq	zero, zero, MainWait
		nop	
	
 #########################################################################
 #
 # start the DMA of the display list into DMEM.
 #
 # Registers upon call:
 #		inp	pointer to read from
 #		gcount	max size to read (bytes)
 #		return	where to go when we're done
 #
 # Registers upon return:
 #		dlcount	size actually read (bytes)
 #		dinp	pointer to data we read in

		.ent	LoadCL

.name dmaddr,	$1
.name draddr, 	$2
.name dma_size, $3
.name tmp,	$4
.name save_ret, $5

LoadDL:		addi	save_ret, return, 0
		addi	dma_size, gcount, 0
		addi	tmp, dma_size, (-1 * RSP_DLINPUT_SIZE8)
		blez	tmp, WillFit
		addi	dmaddr, zero, RSP_DLINPUT_OFFSET
		addi	dma_size, zero, RSP_DLINPUT_SIZE8

WillFit:	addi	dlcount, dma_size, 0
		jal	DMAread
		addi	dma_size, dma_size, -1
		jr	save_ret
		addi	dinp, zero, RSP_DLINPUT_OFFSET

.unname dmaddr
.unname draddr
.unname dma_size
.unname tmp
.unname save_ret

		.end	LoadCL

 #########################################################################
 #
 # DMA read and write routines.
 #
 # Passed parameters:  	$1 DMEM address
 #			$2 DRAM address
 #			$3 Read/Write length

.name	tmp,	$4

 ###################
 #
 # DMA read

		.ent	DMAread

DMAread:	mfc0	tmp, SP_RESERVED
DMAreadwait:	bne	tmp, $0, DMAreadwait
		mfc0	tmp, SP_RESERVED

		mfc0	tmp, DMA_FULL
DRFull1:	bne	tmp, $0, DRFull1
		mfc0	tmp, DMA_FULL

		mtc0	$1, DMA_CACHE
		mtc0	$2, DMA_DRAM

		jr	return
		mtc0	$3, DMA_READ_LENGTH

		.end	DMAread

 ###################
 #
 # DMA write


		.ent	DMAwrite

DMAwrite:	mfc0	tmp, SP_RESERVED
DMAwritewait:	bne	tmp, $0, DMAwritewait
		mfc0	tmp, SP_RESERVED

		mfc0	tmp, DMA_FULL
DRFull2:	bne	tmp, $0, DRFull2
		mfc0	tmp, DMA_FULL

		mtc0	$1, DMA_CACHE
		mtc0	$2, DMA_DRAM

		jr	return
		mtc0	$3, DMA_WRITE_LENGTH

		.end	DMAwrite

.unname	tmp
 
 #########################################################################
 #
 # Modules are separated logically and appended by #include.

#include "asetup.s"
#include "adpcm.s"
#include "afilter.s"
#include "aresample.s"
#include "aenv.s"
#include "amixer.s"