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/************************************************************************
IMEM DMA TESTS: File #0
************************************************************************/
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/****************************************************************
DMA TEST #0.1
****************************************************************/
j Start /* Skip test handling */
nop
Dispatch: /* from DmaTest() */
or $30, $31, $0 /* save return pointer */
jalr $31, $12 /* off we go ... test */
nop
bne $4, $20, Fail /* ret fr test to here */
nop
bne $5, $21, Fail
or $4, $29, $0
or $20, $29, $0
bne $6, $22, Fail
or $5, $29, $0
or $21, $29, $0
bne $7, $23, Fail
or $6, $29, $0
or $22, $29, $0
bne $8, $24, Fail
or $7, $29, $0
or $23, $29, $0
bne $9, $25, Fail
or $8, $29, $0
or $24, $29, $0
bne $10, $26, Fail
or $9, $29, $0
or $25, $29, $0
bne $11, $27, Fail
or $10, $29, $0
or $26, $29, $0
or $11, $29, $0
or $27, $29, $0
jr $30 /* go prep next test */
Start: /* main body */
lui $29, 0x7FFF /* default reg value */
ori $29, $29, 0x0000
or $4, $29, $0 /* reset test regs */
or $5, $29, $0 /* reset test regs */
or $6, $29, $0 /* reset test regs */
or $7, $29, $0 /* reset test regs */
or $8, $29, $0 /* reset test regs */
or $9, $29, $0 /* reset test regs */
or $10, $29, $0 /* reset test regs */
or $11, $29, $0 /* reset test regs */
or $20, $29, $0 /* reset answers */
or $21, $29, $0 /* reset answers */
or $22, $29, $0 /* reset answers */
or $23, $29, $0 /* reset answers */
or $24, $29, $0 /* reset answers */
or $25, $29, $0 /* reset answers */
or $26, $29, $0 /* reset answers */
or $27, $29, $0 /* reset answers */
ori $1, $0, 0x0001 /* R1 = TEST ID */
ori $12, $0, 0x1500 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x5000
ori $14, $0, 0x0AFF /* R14 = length */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $1, $0, 0x0002 /* R1 = TEST ID */
ori $12, $0, 0x15F8 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x6000
ori $14, $0, 0x0007 /* R14 = length */
ori $20, $29, 0x0001 /* answers!! */
ori $21, $29, 0x0001 /* answers!! */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $13, $0, 0x5000 /* restore IMEM pattn */
jal DmemReset
nop /* jump here from test */
ori $1, $0, 0x0003 /* R1 = TEST ID */
ori $12, $0, 0x15F8 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x6008
ori $14, $0, 0x000F /* R14 = length */
ori $22, $29, 0x0001 /* answers!! */
ori $23, $29, 0x0001 /* answers!! */
ori $24, $29, 0x0001 /* answers!! */
ori $25, $29, 0x0001 /* answers!! */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $13, $0, 0x5000 /* restore IMEM pattn */
jal DmemReset
nop /* jump here from test */
ori $1, $0, 0x0004 /* R1 = TEST ID */
ori $12, $0, 0x15E8 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x6030
ori $14, $0, 0x0017 /* R14 = length */
ori $20, $29, 0x0001 /* answers!! */
ori $21, $29, 0x0001 /* answers!! */
ori $24, $29, 0x0001 /* answers!! */
ori $25, $29, 0x0001 /* answers!! */
ori $26, $29, 0x0001 /* answers!! */
ori $27, $29, 0x0001 /* answers!! */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $13, $0, 0x5000 /* restore IMEM pattn */
jal DmemReset
nop /* jump here from test */
ori $1, $0, 0x0005 /* R1 = TEST ID */
ori $12, $0, 0x15F0 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x6030
ori $14, $0, 0x0017 /* R14 = length */
ori $20, $29, 0x0001 /* answers!! */
ori $21, $29, 0x0001 /* answers!! */
ori $24, $29, 0x0001 /* answers!! */
ori $25, $29, 0x0001 /* answers!! */
ori $26, $29, 0x0001 /* answers!! */
ori $27, $29, 0x0001 /* answers!! */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $13, $0, 0x5000 /* restore IMEM pattn */
jal DmemReset
nop /* jump here from test */
ori $1, $0, 0x0006 /* R1 = TEST ID */
ori $12, $0, 0x15F8 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x6030
ori $14, $0, 0x0017 /* R14 = length */
ori $20, $29, 0x0001 /* answers!! */
ori $21, $29, 0x0001 /* answers!! */
ori $24, $29, 0x0001 /* answers!! */
ori $25, $29, 0x0001 /* answers!! */
ori $26, $29, 0x0001 /* answers!! */
ori $27, $29, 0x0001 /* answers!! */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $13, $0, 0x5000 /* restore IMEM pattn */
jal DmemReset
nop /* jump here from test */
ori $1, $0, 0x0007 /* R1 = TEST ID */
ori $12, $0, 0x1600 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x6030
ori $14, $0, 0x0017 /* R14 = length */
ori $20, $29, 0x0001 /* answers!! */
ori $21, $29, 0x0001 /* answers!! */
ori $24, $29, 0x0001 /* answers!! */
ori $25, $29, 0x0001 /* answers!! */
ori $26, $29, 0x0001 /* answers!! */
ori $27, $29, 0x0001 /* answers!! */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $13, $0, 0x5000 /* restore IMEM pattn */
jal DmemReset
nop /* jump here from test */
ori $1, $0, 0x0008 /* R1 = TEST ID */
ori $12, $0, 0x1788 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x6010
ori $14, $0, 0x0077 /* R14 = length */
ori $20, $29, 0x0004 /* answers!! */
ori $21, $29, 0x0004 /* answers!! */
ori $22, $29, 0x0003 /* answers!! */
ori $23, $29, 0x0003 /* answers!! */
ori $24, $29, 0x0004 /* answers!! */
ori $25, $29, 0x0004 /* answers!! */
ori $26, $29, 0x0004 /* answers!! */
ori $27, $29, 0x0004 /* answers!! */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $13, $0, 0x5000 /* restore IMEM pattn */
jal DmemReset
nop /* jump here from test */
ori $1, $0, 0x0009 /* R1 = TEST ID */
ori $12, $0, 0x1780 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x6018
ori $14, $0, 0x007F /* R14 = length */
ori $20, $29, 0x0004 /* answers!! */
ori $21, $29, 0x0004 /* answers!! */
ori $22, $29, 0x0004 /* answers!! */
ori $23, $29, 0x0004 /* answers!! */
ori $24, $29, 0x0004 /* answers!! */
ori $25, $29, 0x0004 /* answers!! */
ori $26, $29, 0x0004 /* answers!! */
ori $27, $29, 0x0004 /* answers!! */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $13, $0, 0x5000 /* restore IMEM pattn */
jal DmemReset
nop /* jump here from test */
ori $1, $0, 0x000A /* R1 = TEST ID */
ori $12, $0, 0x1780 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x6020
ori $14, $0, 0x0087 /* R14 = length */
ori $20, $29, 0x0005 /* answers!! */
ori $21, $29, 0x0005 /* answers!! */
ori $22, $29, 0x0004 /* answers!! */
ori $23, $29, 0x0004 /* answers!! */
ori $24, $29, 0x0004 /* answers!! */
ori $25, $29, 0x0004 /* answers!! */
ori $26, $29, 0x0004 /* answers!! */
ori $27, $29, 0x0004 /* answers!! */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $13, $0, 0x5000 /* restore IMEM pattn */
jal DmemReset
nop /* jump here from test */
ori $1, $0, 0x000B /* R1 = TEST ID */
ori $12, $0, 0x17F8 /* R12 = IMEM address */
lui $13, 0x0000 /* R13 = DRAM address */
ori $13, $13, 0x6028
ori $14, $0, 0x07FF /* R14 = length */
ori $20, $29, 0x0040 /* answers!! */
ori $21, $29, 0x0040 /* answers!! */
ori $22, $29, 0x0040 /* answers!! */
ori $23, $29, 0x0040 /* answers!! */
ori $24, $29, 0x0040 /* answers!! */
ori $25, $29, 0x0040 /* answers!! */
ori $26, $29, 0x0040 /* answers!! */
ori $27, $29, 0x0040 /* answers!! */
jal DmaTest /* go start the DMA */
nop /* jump here from test */
ori $13, $0, 0x5000 /* restore IMEM pattn */
jal DmemReset
nop /* jump here from test */
nop
j Done
nop
DmaTest:
mtc0 $12, $0
mtc0 $13, $1
mtc0 $14, $2
Wait: mfc0 $15, $6
bne $15, $0, Wait
nop
j Dispatch
nop
DmemReset:
mtc0 $12, $0
mtc0 $13, $1
mtc0 $14, $2
jr $31
nop
/****************************************************************
Wrap up ...
****************************************************************/
nop
Done: ori $1, $0, 0xFEED /* Test passed */
break
Time: ori $1, $0, 0xDEAD /* Timed-out from DMA */
break
Fail: break
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
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nop
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nop
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j Fail
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j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop
j Fail
nop