/*
 * Copyright (C) 1996-1998 by the Board of Trustees
 *    of Leland Stanford Junior University.
 * 
 * This file is part of the SimOS distribution. 
 * See LICENSE file for terms of the license. 
 *
 */

 /****************************************************************
 * clock.c
 * 
 * $Author: blythe $
 * $Date: 2002/05/29 01:09:10 $
 *****************************************************************/
#include <stdio.h>
#include <string.h>
#include "simmisc.h"
#include "checkpoint.h"
#include "simmagic.h"
#include "sips.h"
#include "eventcallback.h"
#include "simutil.h"
#include "embra.h"
#include "cp0.h"
#include "clock.h"
#include "main_run.h"
#include "mem_control.h"
#include "stats.h"
#include "callout.h"
#include "translator.h"
#include "debug.h"
#include "driver.h"
#include "hw_events.h"
#include "embra_interface.h"

/* **********************************************************************
 * All of the clock shared state is in shared memory. All of the callbacks
 * must be in shared memory, event non IPI as the callbacks themselves are
 * queued.
 * **********************************************************************/

#define MAX_INTERRUPT_CALLBACKS (16*SIM_MAXCPUS)


typedef struct ClockSharedState {
    EventCallbackHdr interrupts[MAX_INTERRUPT_CALLBACKS];
    int rotor;
    int lock;
    EventCallbackHdr pcSampling[SIM_MAXCPUS];
    EventCallbackHdr periodicCallback[SIM_MAXCPUS];
    EventCallbackHdr periodicAnnotationCallback;
    EventCallbackHdr statCallback[SIM_MAXCPUS];
    EventCallbackHdr bootCallback;
    EventCallbackHdr exitCallback;
} ClockSharedState;

extern K0A non_excepting_tv( int cpuNum, VA va );

static ClockSharedState *clockState;
/* Local Data */
static int pc_sample_interval = 256;

int callout_interval = 0;
/* Local Functions */
static void InitPeriodicCallbacks(int cpu);
static void StatCallback(int cpuNum, EventCallbackHdr *hdr,void *arg);
static void PeriodicCallback(int cpuNum, EventCallbackHdr *hdr,void *arg);
static void PeriodicAnnotationCallback(int cpuNum, EventCallbackHdr *hdr,void *arg);
static void BootCallback(int cpuNum, EventCallbackHdr *hdr,void *arg);
static SimTime next_PCSample;

static void InitPeriodicCallbacks(int cpu)
{
   ASSERT (cpu==0);
  if (embra.stats) {
     EventDoCallback(cpu,StatCallback,
                     &clockState->statCallback[cpu],0,
                     embra.statInterval);
  }
  EventDoCallback(cpu,PeriodicCallback,
                  &clockState->periodicCallback[cpu],0,
                  embra.miscCheckInterval);

  if (cpu == 0) {
     EventDoCallback(0,PeriodicAnnotationCallback,
                     &clockState->periodicAnnotationCallback,0,
                     embra.periodicAnnInterval);
  }
}


void EmbraClosePeriodicCallbacks(void)
{
   int cpu = 0;
   if (EventCallbackActive(&clockState->statCallback[cpu])) {
      EventCallbackRemove(&clockState->statCallback[cpu]);
   }
   if (EventCallbackActive(&clockState->periodicCallback[cpu])) {
      EventCallbackRemove(&clockState->periodicCallback[cpu]);
   }
   if (EventCallbackActive(&clockState->periodicAnnotationCallback)) { 
      EventCallbackRemove(&clockState->periodicAnnotationCallback);
   }
}



void
Embra_Clock_Init(int cpuNum)
{

   /*
    * allow fast check from assembly 
    */

   callout_interval = embra.timeQuantum;

   if( embra.MPinUP ) {
      int i;
      EMP[TOTAL_CPUS].eventQueueTimePtr = SingleEventQueueCalltimeAddr;
      for( i = 0; i <= TOTAL_CPUS; i++) {
         EMP[i].timeQuantum = embra.timeQuantum;
         EMP[i].cycleCountdown = EMP[i].timeQuantum;
      }
      InitPeriodicCallbacks(0);
   } else {
      ASSERT (!cpuNum);
      ASSERT( TOTAL_CPUS ==1);
      EMP[0].eventQueueTimePtr = SingleEventQueueCalltimeAddr;
      EMP[0].timeQuantum       = embra.timeQuantum;
      EMP[cpuNum].cycleCountdown = embra.timeQuantum;
      InitPeriodicCallbacks(cpuNum);
   }
}

int
Update_And_Check_Interrupts( int cpuNum , VA targetPC)
{
   /*CPUWarning("CPU %d Update and Check HW 0x%x\n ", 
            cpuNum,
            EMP[cpuNum].intrBitsPtr[0] ); */
   /* Update and check for interrupts */

   EMP[cpuNum].CP0[C0_CAUSE] = 
      (EMP[cpuNum].CP0[C0_CAUSE] & ~CAUSE_EXTINTBITS) | 
      ((EMP[cpuNum].intrBitsPtr[0] << CAUSE_IPSHIFT) & CAUSE_EXTINTBITS);

   if (((EMP[cpuNum].CP0[C0_CAUSE] & EMP[cpuNum].CP0[C0_SR]) & SR_IMASK) &&
        (EMP[cpuNum].CP0[C0_SR] & SR_IEC) &&
       !((EMP[cpuNum].CP0[C0_SR] & (SR_EXL|SR_ERL)))) {

      /* Processors generally take excpetions in between instructions */
      /* so when  we are stalled for a cache miss (or whatever), delay */
      /* excpetion (interrupt) detection */
         if( !EMP[cpuNum].stalled ) {
            if (targetPC) { 
               ASSERT (!IN_BD(targetPC));
               ASSERT (IS_KSEG0(targetPC) || IS_KUSEG(targetPC));

               /*
                * now is the time to field the post-pc annotation,
                * since we are skipping the instruction by smashing
                * the PC.
                */
               ASSERT (cpuNum==curEmp->myNum);
               AnnExec(AnnFMLookup(CLEAR_BD(EMP[cpuNum].PC),ANNFM_PC_TYPE));
               EMP[cpuNum].PC = targetPC;
            }
            Em_EXCEPTION(cpuNum,EXC_INT,0);
            EmbraSideEffect();
            return 1;
         }
   }
   return 0;
}

void EmIntrBitsChanged(int cpuNum)
{
   Update_And_Check_Interrupts(cpuNum,0);
}


/* Do Interrupt Now (only takes exception if interrupt is enabled) */

static void EmbraInterruptCallback(int cpuNum, EventCallbackHdr *hdr, void *arg)
{
   IEC intrtoset = (IEC) (int) arg;   /* keep compiler quiet by casting thru int */

   SIM_DEBUG(('i',"DEV %d %lld Send 0x%x ", 
              cpuNum, EmbraCpuCycleCount(cpuNum), intrtoset));
   RaiseIBit(cpuNum, intrtoset);
   SIM_DEBUG(('i', "Ibits 0x%x\n", EMP[cpuNum].intrBitsPtr[0]));

   Update_And_Check_Interrupts( cpuNum,0 );
}

/* Do deliver SIPS Now */
static void EmbraDeliverSIPSCallback(int cpuNum, EventCallbackHdr *hdr,void *arg)
{
   sim_sips_deliver(cpuNum, (int)arg /* chan */);
   Update_And_Check_Interrupts( cpuNum ,0);
}

/* Do Interrupt Now (only takes exception if interrupt is enabled) */
static void BootCallback(int cpuNum, EventCallbackHdr *hdr,void *arg)
{
   int cpu;
   for( cpu = 1; cpu < TOTAL_CPUS; cpu++ ) {
      uint launchAddr = (uint)sim_misc.launchAddr[cpu];
      if( launchAddr ) {
        /* XXX - non-backdoor address is launch, backdoor address is call */
         if( IS_BACKDOOR(launchAddr) ) {
            int64 result;
            /* Do call */
            result = ((int64 (*)(int,int,int,int))launchAddr)
               ( sim_misc.launchArg[cpu][0],
                 sim_misc.launchArg[cpu][1],
                 sim_misc.launchArg[cpu][2],
                 sim_misc.launchArg[cpu][3] );

            if( result == SLAVELOOP_CONTINUE ) {
               /* signal init function done */
               sim_misc.launchAddr[cpu] = 0;
               /* clear so will be 0 if not set up on next call */
               sim_misc.launchArg[cpu][0] = 0;
               sim_misc.launchArg[cpu][1] = 0;
               sim_misc.launchArg[cpu][2] = 0;
               sim_misc.launchArg[cpu][3] = 0;
               CPUPut("Slave %d returning to launch wait\n",cpu );
            }
         } else {
            /* Add everybody in & let mem_control handle launch */
            int i;
            for( i = 0; i <= TOTAL_CPUS; i++ ) {
               EMP[i].next = &EMP[(i+1)%(TOTAL_CPUS+1)];
            } /* for */
            /* Don't reinstall callback */
            return;
         }
      }
   }
   EventDoCallback(cpuNum,BootCallback,hdr,0,embra.timeQuantum);
}

void Embra_Send_Interrupt( int cpuNum, IEC intrtoset, SimTime delay )
{    
    int count = 0;
    EventCallbackHdr *event;

    if( delay == 0 ) {
       /* SIMLOCK();*/ 
       RaiseIBit(cpuNum, intrtoset);
       /* SIMUNLOCK();*/
       Update_And_Check_Interrupts( cpuNum,0 );
    } else {
       clockState->rotor = (clockState->rotor+1)%MAX_INTERRUPT_CALLBACKS;
       while( EventCallbackActive(&clockState->interrupts[clockState->rotor]) ){
          count++;
          ASSERT( count < MAX_INTERRUPT_CALLBACKS  );
          clockState->rotor = (clockState->rotor+1)% MAX_INTERRUPT_CALLBACKS;
       }
       event = &clockState->interrupts[ clockState->rotor];
       EventDoCallback(cpuNum,EmbraInterruptCallback,event,(void *)(int)intrtoset,delay);
    }
}

void Embra_Deliver_SIPS( int cpuNum, int chan, SimTime delay )
{    
    int count = 0;
    EventCallbackHdr *event;

    clockState->rotor = (clockState->rotor+1)%MAX_INTERRUPT_CALLBACKS;
    while( EventCallbackActive(&clockState->interrupts[clockState->rotor]) ){
        count++;
        ASSERT( count < MAX_INTERRUPT_CALLBACKS  );
        clockState->rotor = (clockState->rotor+1)% MAX_INTERRUPT_CALLBACKS;
    }
    event = &clockState->interrupts[ clockState->rotor];
    EventDoCallback(cpuNum,EmbraDeliverSIPSCallback,event,(void *)chan,delay);
}

static void StatCallback(int cpuNum, EventCallbackHdr *hdr,void *arg)
{
   Print_Recent_Stats(cpuNum);
   EventDoCallback(cpuNum,StatCallback,hdr,0,embra.statInterval);
}


static void PeriodicCallback(int cpuNum, EventCallbackHdr *hdr,void *arg)
{
#if 0
    CPUPrint("callback %i %lld\n",cpuNum,CPUVec.CpuCycleCount(cpuNum));
#endif
    EventDoCallback(cpuNum,PeriodicCallback,hdr,0,embra.miscCheckInterval);

    EmbraPollSigUsr(cpuNum);


    if( sim_misc.myCPUType != sim_misc.enterThisCPU) {
       EmbraExit(sim_misc.enterThisCPU);
    }

}

static void PeriodicAnnotationCallback(int cpuNum, EventCallbackHdr *hdr,void *arg)
{
   ASSERT(cpuNum == 0);
   EventDoCallback(0,PeriodicAnnotationCallback,hdr,0,embra.periodicAnnInterval);
   PERIODIC_EVENT;
}


/* ****************************************************************
 * Periodic_Callout is called very frequently. Keep it as short as 
 * possible. 
 * ****************************************************************/


void IncCC(int cpuNum, int inc)
{
   EMP[cpuNum].cycleCount += EMP[cpuNum].timeQuantum;
}

/*#define DEBUG_EVENTPOLL*/
#ifdef DEBUG_EVENTPOLL
static struct {
   uint cycleCountdown;
   uint PC;
   uint64 cycleCount;
   uint stalled;
} debug_evpoll[SIM_MAXCPUS];
static SimTime last_call;
#endif

void GeneralEmEventPoll(int cpuNum)
{
   /*CPUPrint("%d GeneralEmEventPoll\n", cpuNum);*/
   ASSERT(cpuNum < TOTAL_CPUS);
#ifdef notdef
#ifdef STALL_BY_REMOVING_FROM_LOOP
   /* This needs justification */
   /*EMP[TOTAL_CPUS].cycleCount += EMP[0].timeQuantum;*/
   /*EventPollSingleQueue(EMP[TOTAL_CPUS].cycleCount);*/
#else
   ASSERT(cpuNum == 0 );
#endif
#endif /* notdef */
   /* Value passed to EventPoll is a hint telling it how far down the
      callback queue to look.  We know all cycle counts are within 1
      quantum, so this should suffice */
#ifdef DEBUG_EVENTPOLL
   ASSERT( EmbraCpuCycleCount(0) + 4*EMP[0].timeQuantum > last_call);
#endif
   EventPollSingleQueue(EmbraCpuCycleCount(0) + 4*EMP[0].timeQuantum);
#ifdef DEBUG_EVENTPOLL
   debug_evpoll[cpuNum].cycleCountdown = EMP[cpuNum].cycleCountdown;
   debug_evpoll[cpuNum].PC = EMP[cpuNum].PC;
   debug_evpoll[cpuNum].cycleCount = EMP[cpuNum].cycleCount;
   debug_evpoll[cpuNum].stalled = EMP[cpuNum].stalled;
   last_call = EmbraCpuCycleCount(0) + 4*EMP[0].timeQuantum;
#endif
   /* some event hung off the cycle count may have
    * changed memory (eg. the debugger).  This checks that.
    */
   FlushTCIfNecessary(cpuNum);
   ReenterTC(EMP[TOTAL_CPUS].next);
   /* NOT REACHED */
}

/* This is called when a single event queue is used TOTAL_CPUS == 1 || MPinUP */
EmbraState* CEmEventPoll(void)
{

   /* Value passed to EventPoll is a hint telling it how far down the
      callback queue to look.  We know all cycle counts are within 1
      quantum, so this should suffice */
   SimTime now_ish = EmbraCpuCycleCount(0);
   if (eventQueues->calltime + 100000 < now_ish) {
      CPUWarning("CEmEventPoll missing callouts calltime=%lld, nowish=%lld \n",
                 eventQueues->calltime, now_ish);
   }
   
         
#ifdef DEBUG_EVENTPOLL
   ASSERT( now_ish >= last_call );
#endif

   if( EventPendingSingleQueue(now_ish) ) {
      EventProcessSingleQueue( now_ish );
      /* Code is written to assume that this will happen because
         exceptions can be raised in a callback */
      ReenterTC( &EMP[0] );
      /* NOT REACHED */
   }

#ifdef DEBUG_EVENTPOLL
   debug_evpoll[cpuNum].cycleCountdown = EMP[cpuNum].cycleCountdown;
   debug_evpoll[cpuNum].PC = EMP[cpuNum].PC;
   debug_evpoll[cpuNum].cycleCount = EMP[cpuNum].cycleCount;
   debug_evpoll[cpuNum].stalled = EMP[cpuNum].stalled;
   last_call = EmbraCpuCycleCount(0) + 4*EMP[0].timeQuantum;
#endif
   /* ReenterTC(EMP[TOTAL_CPUS].next);*/
   /* NOT REACHED */
   return &EMP[0];
}

void NonReturningProcReturned(void)
{
   VASSERT(0,("Non-returning procedure returned.  This is bad.\n"));
}

SimTime EmbraReadTime( void )
{
   if( embra.MPinUP ) {
      return EmbraCpuCycleCount(0);
   } else {
      return EmbraCpuCycleCount(CURR_CPU);
   }
}

/*#define DEBUG_CLOCK*/
#ifdef DEBUG_CLOCK
static struct {
   uint cycleCountdown;
   uint PC;
   uint64 cycleCount;
   uint clock_val;
} debug_clock[SIM_MAXCPUS];
#endif
SimTime EmbraCpuCycleCount(int cpuNum)
{
   static SimTime last_returned_value;
   SimTime new_value;

   new_value = EMP[cpuNum].cycleCount + 
      ( (int64)(EMP[cpuNum].timeQuantum - 
                    EMP[cpuNum].cycleCountdown ) );
   
#ifdef DEBUG_CLOCK
   if (new_value < debug_clock[cpuNum].clock_val) {
      CPUWarning("cpu %d retrograde clock %lld->%lld, staying at max\n",
                 cpuNum, debug_clock[cpuNum].clock_val, new_value);
      new_value = debug_clock[cpuNum].clock_val;
   }
   
   debug_clock[cpuNum].cycleCountdown = EMP[cpuNum].cycleCountdown;
   debug_clock[cpuNum].cycleCount = EMP[cpuNum].cycleCount;
   debug_clock[cpuNum].PC = EMP[cpuNum].PC;
   debug_clock[cpuNum].clock_val = new_value;
#endif
   return new_value;
}

/* Make the .cycleCount field the actual current time */

void EmbraFixCycleCounts(void)
{
   int cpuNum;
   SimTime maxTime = 0;
   for (cpuNum=0;cpuNum<TOTAL_CPUS;cpuNum++) { 
      EMP[cpuNum].cycleCount += EMP[cpuNum].timeQuantum - 
         EMP[cpuNum].cycleCountdown;
      EMP[cpuNum].cycleCountdown = EMP[cpuNum].timeQuantum;
      if ( EMP[cpuNum].cycleCount > maxTime) { 
         maxTime = EMP[cpuNum].cycleCount;
      }
   }
   for (cpuNum=0;cpuNum<TOTAL_CPUS;cpuNum++) { 
      EMP[cpuNum].cycleCount = maxTime;
   }
}


void EmbraClockInit(void)
{
    if( !clockState ) {
        clockState = MallocShared(sizeof(ClockSharedState),"EmClock");
    }
    ASSERT( clockState );
}

/******************************************************************
 * Write a call to the system call exit on the user's stack.  Then 
 * jump to it 
*****************************************************************/
void 
EmbraMakeProcExit(int cpuNum)
{
   EmbraState *P = &EMP[cpuNum];
   uint *pPtr;
   VA vSP;

   /* Insure that we are not writting over a page boundary by using */
   /* the beginning of the page*/  
   vSP = FORM_ADDR( PAGE_NUMBER(P->R[REG_SP]), 0 );
   pPtr = (uint*) non_excepting_tv( cpuNum, vSP );
   if( !pPtr ) {
      CPUWarning("Failure to translate stack addr in MakeProcExit\n");
      return;
   }

   CPUWarning("PROCexit: CPU %d smashing address %#x\n", P->myNum, vSP);

   *pPtr++ = CIi( addiu_op, A0, G0, 0 ); /* li a0, 0 */
   *pPtr++ = CIi( addiu_op, V0, G0, 1001 ); /* li v0, 1001 */

   /* This trick won't work in base mode both because of this opcode */
   /* because we are not flushing the data cache*/
   *pPtr++ = CIs( syscall_op, 0, 0, 0); /* syscall */
   P->PC = vSP;
   return;
}