ao01d2.v 205 Bytes Raw Blame History Permalink 1 2 3 4 5 6 7 module ao01d2 (zn, a1, a2, b1, b2); input a1, a2, b1, b2; output zn; and G2(N2, b1, b2), G3(N3, a1, a2); nor G4(zn, N3, N2); endmodule
