#cell2 * suDpSchem la * 148 any 96256 v8r4.6.4
# "6-Dec-94 GMT" "19:36:30 GMT" "15-Sep-94 GMT" "17:21:52 GMT" doherty * .la dpmux6061 dpmux2021 dpalu001s dprpt0010 dpclktgc0 dpconleft dptsb1023 dptsb1021 dpxnr0021 dp1dt001s dpswzboti dptitle00 dpclkckt0 dpconright dpswzboto dpmux5051 dpdff0101 dprgf011h dpmux4041 dpbsh004h dpmux3031 dpswzint0 dpfdtvert bsheet .
V 15 COMPASSlogicAssist
T C  
L ""
I 110
B 43 70 1669 1005
M 1073791516 1073783600 1073791434 1073779030
F micej
D "" "" "" "0" "0" "0" "0" "0" "0"
C 110 300 6 5 30 "inst_data" small LC B NSTCI 0 30 1
N 150 340 "inst_data" normal RC B
C 110 380 5 5 60 "link_pc_delay_pc" small LC B NSTCI 0 60 1
N 180 420 "link_pc_delay_pc" normal RC B
C 1210 920 9 5 10 "branch_or_addr" small LC B NSTCO 0 10 1
N 1280 960 "branch_or_addr" normal RC B
C 110 830 1 5 20 "ls_data" small LC B NSTCO 0 20 1
N 150 870 "ls_data" normal RC B
V 4 *
B 0 0 150 150 1 0
T 70 103 "@@InstName" normal CB B I
T 70 85 "@@Label" normal CC B L
T 80 146 "suDpSchem" normal CT B T
E
O "bsheet" 0 0 1100 800 N
I suonesdetz 102 1 871 930 0 "[la]dpfdtvert" "" 6 N * 1 "cardinality" "1" HLMC
I suRFile 86 1 310 600 0 "[la]dprgf011h" "" 6 N * 1 "number_of_words" "32" HLMC
I suWbEn 92 1 1580 590 0 "[la]dptsb1021" "" 6 N * 0
I suEdFF 17 1 1380 590 0 "[la]dpdff0101" "" 6 N * 0
I suDwFF 90 1 1490 590 0 "[la]dpdff0101" "" 6 N * 0
I suImmLsMux 108 1 550 250 0 "[la]dpmux2021" "" 6 N * 0
I suREinstFF 99 1 630 260 0 "[la]dpdff0101" "" 6 N * 0
I suImmZxt 35 1 320 280 0 "[la]dpswzint0" "" 6 * * 1 "spec" "16*15 15:0" HLMC
I suImmLui 39 1 320 260 0 "[la]dpswzint0" "" 6 * * 1 "spec" "15:0 16L" HLMC
I suImmBr 48 1 320 240 0 "[la]dpswzint0" "" 6 * * 1 "spec" "14*15 15:0 2L" HLMC
I suImmMux 106 1 360 240 0 "[la]dpmux4041" "" 6 N * 0
P 260 190 S
P 260 110 S
P 260 130 S
P 260 150 S
P 260 170 S
I suShVAmt 76 1 600 190 4 "[la]dpswzboto" "" 6 N * 1 "spec" "4:0" HLMC
I suVuQOffset 61 1 320 110 0 "[la]dpswzint0" "" 6 * * 1 "spec" "21*6 6:0 4L" HLMC
I suVuDOffset 62 1 320 130 0 "[la]dpswzint0" "" 6 * * 1 "spec" "22*6 6:0 3L" HLMC
I suVuWOffset 63 1 320 150 0 "[la]dpswzint0" "" 6 * * 1 "spec" "23*6 6:0 2L" HLMC
I suVuSOffset 65 1 320 170 0 "[la]dpswzint0" "" 6 * * 1 "spec" "24*6 6:0 L" HLMC
I suVuBOffset 64 1 320 190 0 "[la]dpswzint0" "" 6 * * 1 "spec" "25*6 6:0" HLMC
I suVuLsOffsetMux 68 1 360 110 0 "[la]dpmux5051" "" 6 * * 0
P 500 150 S
P 300 240 S
I suExBSign 72 1 730 190 0 "[la]dpswzboto" "" 6 N * 1 "spec" "31" HLMC
I suExASign 49 1 700 190 4 "[la]dpswzboto" "" 6 N * 1 "spec" "31" HLMC
P 260 300 S
I instData 7 1 110 300 0 "[la]dpconright" "" 6 * * 1 "spec" "" HLMC
I linkPcDelayPc 8 1 110 380 0 "[la]dpconright" "" 6 * * 1 "spec" "" HLMC
I suRdBMux 109 1 550 420 0 "[la]dpmux6061" "" 6 N * 0
I zeros 15 1 380 450 0 "[la]dpswzint0" "" 6 N * 1 "spec" "32L" HLMC
I suImmSxt 36 1 320 300 0 "[la]dpswzint0" "" 6 * * 1 "spec" "16L 15:0" HLMC
I suPCswizzle 50 1 320 380 0 "[la]dpswzint0" "" 6 N * 1 "spec" "8L 23:0" HLMC
P 300 300 S
P 300 280 S
P 300 260 S
P 500 250 S
P 490 270 S
I suReinstFFClk 31 1 650 290 0 "[la]dpclkckt0" "" 6 * * 1 "clock_number" "1" HLMC
P 770 260 S
P 750 380 S
P 730 320 S
P 700 340 S
P 480 420 S
P 490 440 S
P 530 500 S
P 520 480 S
P 510 460 S
P 480 450 S
I suReBFF 98 1 630 470 0 "[la]dpdff0101" "" 6 N * 0
I suReBffClk 37 1 650 500 0 "[la]dpclkckt0" "" 6 * * 1 "clock_number" "1" HLMC
P 730 470 S
P 730 490 S
P 750 470 S
P 730 440 S
P 700 530 S
I suSltswizzle 57 1 1220 240 1 "[la]dpswzint0" "" 6 * * 1 "spec" "31L 0" HLMC
I suDpTitle 9 1 1370 186 0 "[la]dptitle00" "" 6 * * 2 "number_of_bits" "32" HLMC "title" "suDpSchem" HLMCI
I suSltLt 58 1 1220 190 0 "[la]dpswzboti" "" 6 N * 1 "spec" "0" HLMC
I suAluMSB 77 1 1190 190 4 "[la]dpswzboto" "" 6 N * 1 "spec" "31" HLMC
I shiftAmt 9 1 1100 190 4 "[la]dpswzboti" "" 6 N * 1 "spec" "31:0" HLMC
I suOnesDet 44 1 1060 330 0 "[la]dp1dt001s" "" 6 * * 0
I suShift 4 1 1000 420 0 "[la]dpbsh004h" "" 6 N * 1 "Number_of_Shifts" "32" HLMC
I suSh1swizzle 82 1 880 400 0 "[la]dpswzint0" "" 6 * * 1 "spec" "32H" HLMC
I suSh0swizzle 81 1 880 420 0 "[la]dpswzint0" "" 6 * * 1 "spec" "32L" HLMC
I suShR1swizzle 84 1 880 440 0 "[la]dpswzint0" "" 6 * * 1 "spec" "L 31:1" HLMC
I suShBMux 83 1 920 400 0 "[la]dpmux3031" "" 6 N * 0
I suEq 43 1 970 320 0 "[la]dpxnr0021" "" 6 N * 0
P 1220 340 S
I suSltEn 53 1 1240 340 0 "[la]dptsb1021" "" 6 N * 0
P 1320 340 S
I suShAMux 79 1 920 470 0 "[la]dpmux4041" "" 6 N * 0
P 850 490 S
I suShL31swizzle 80 1 880 510 0 "[la]dpswzint0" "" 6 * * 1 "spec" "0 31L" HLMC
P 850 510 S
I suShEn 16 1 1240 440 0 "[la]dptsb1021" "" 6 N * 0
P 1320 440 S
P 1100 550 S
I suLoadEn 107 1 210 600 0 "[la]dptsb1023" "" 6 N * 0
P 160 600 S
I suDriveLS 101 1 250 830 4 "[la]dptsb1023" "" 6 N * 0
I storeData 71 1 110 830 0 "[la]dpconleft" "" 6 * * 1 "spec" "" HLMC
P 160 830 S
I suRdAMux 94 1 550 630 0 "[la]dpmux5051" "" 6 N * 0
I suRfileClk 100 1 360 630 0 "[la]dpclktgc0" "" 6 * * 1 "clock_number" "1" HLMC
P 290 600 S
P 440 600 S
P 440 710 S
P 480 630 S
P 530 690 S
P 520 670 S
P 510 650 S
P 750 720 S
P 730 660 S
P 770 640 S
P 700 670 S
P 600 670 S
I suReAFF 96 1 630 670 0 "[la]dpdff0101" "" 6 N * 0
I suReAffClk 36 1 650 700 0 "[la]dpclkckt0" "" 6 * * 1 "clock_number" "1" HLMC
P 530 770 S
P 290 810 S
P 510 810 S
P 520 790 S
P 730 830 S
P 700 740 S
I suExRpt 13 1 1350 700 0 "[la]dprpt0010" "" 6 * * 0
I brLdAddr 6 1 1210 920 0 "[la]dpconright" "" 6 * * 1 "spec" "" HLMC
I sualucoutl 104 1 1091 930 0 "[la]dpfdtvert" "" 6 N * 1 "cardinality" "1" HLMC
I addrSwzl 52 1 1210 840 1 "[la]dpswzint0" "" 6 * * 1 "spec" "11:0" HLMC
I sualuovr 103 1 981 930 0 "[la]dpfdtvert" "" 6 N * 1 "cardinality" "1" HLMC
I suAluEn 15 1 1240 690 0 "[la]dptsb1021" "" 6 N * 0
I suAlu 5 1 1000 650 0 "[la]dpalu001s" "" 6 N * 0
I suAluAMux 24 1 920 720 0 "[la]dpmux2021" "" 6 N * 0
P 1210 690 S
P 1190 690 S
I suAluBMux 23 1 920 640 0 "[la]dpmux2021" "" 6 N * 0
P 1320 690 S
P 1320 590 S
P 1320 770 S
I suWbRpt 27 1 1410 860 0 "[la]dprpt0010" "" 6 * * 0
P 1470 790 S
P 1410 810 S
P 1660 810 S
I suDwFFClk 91 1 1510 620 0 "[la]dpclkckt0" "" 6 * * 1 "clock_number" "1" HLMC
P 1470 590 S
I suEdFFClk 38 1 1400 620 0 "[la]dpclkckt0" "" 6 * * 1 "clock_number" "1" HLMC
P 1350 590 S
P 1660 590 S
J 27 suVuLsOffsetMux 2 "i4" 22 suVuQOffset 2 "o"
J 27 suVuLsOffsetMux 3 "i3" 23 suVuDOffset 2 "o"
J 27 suVuLsOffsetMux 4 "i2" 24 suVuWOffset 2 "o"
J 14 suImmBr 2 "o" 15 suImmMux 2 "i3"
J 27 suVuLsOffsetMux 5 "i1" 25 suVuSOffset 2 "o"
J 27 suVuLsOffsetMux 6 "i0" 26 suVuBOffset 2 "o"
J 1 33 instData 1 "i"
J 2 34 linkPcDelayPc 1 "i"
J 37 suImmSxt 2 "o" 15 suImmMux 5 "i0"
J 12 suImmZxt 2 "o" 15 suImmMux 4 "i1"
J 13 suImmLui 2 "o" 15 suImmMux 3 "i2"
J 44 suReinstFFClk 1 "clockspec" 11 suREinstFF 3 "clockspec"
J 56 suReBffClk 1 "clockspec" 55 suReBFF 3 "clockspec"
J 69 suSh1swizzle 2 "o" 72 suShBMux 2 "i2"
J 70 suSh0swizzle 2 "o" 72 suShBMux 3 "i1"
J 72 suShBMux 4 "i0" 71 suShR1swizzle 2 "o"
J 77 suShAMux 4 "i1" 79 suShL31swizzle 2 "o"
J 4 87 storeData 1 "i"
J 6 suRFile 4 "clockspec" 90 suRfileClk 1 "clockspec"
J 104 suReAffClk 1 "clockspec" 103 suReAFF 3 "clockspec"
J 9 suDwFF 3 "clockspec" 129 suDwFFClk 1 "clockspec"
J 8 suEdFF 3 "clockspec" 131 suEdFFClk 1 "clockspec"
J 3 112 brLdAddr 1 "i"
S 60 71 suShR1swizzle 1 "i" 1 SH
S 107 127 1 SH
N 915 815 "wb_data" normal CB B
S 47 73 suEq 1 "a2" 1 SH
S 99 121 suAluBMux 3 "i0" 1 SH
N 820 665 "exBSrc" normal CB B
S 100 121 suAluBMux 2 "i1" 1 SH
S 48 73 suEq 3 "a1" 1 SH
S 105 124 1 SH
S 98 118 suAluAMux 2 "i1" 1 SH
N 825 725 "exNextPc" normal CB B
S 110 118 suAluAMux 3 "i0" 1 SH
N 820 745 "exASrc" normal CB B
S 108 126 1 SH
N 925 795 "df_data" normal CB B
S 59 77 suShAMux 2 "i3" 1 SH
S 61 77 suShAMux 5 "i0" 1 SH
S 58 78 1 SH
S 45 100 1 SV
S 51 95 1 SV
S 52 96 1 SV
S 53 97 1 SV
S 65 suAluMSB 1 "o" 120 1 SV
S 21 suShVAmt 1 "o" 102 1 SV
S 58 99 1 SV
S 59 98 1 SV
S 61 101 1 SV
S 82 123 1 SV
N 935 795 "ex_data" normal CT B
S 54 94 1 SV
S 19 24 suVuWOffset 1 "i" 1 SH
S 20 25 suVuSOffset 1 "i" 1 SH
S 16 26 suVuBOffset 1 "i" 1 SH
S 32 39 1 SH
S 34 linkPcDelayPc 1 "i" 38 suPCswizzle 1 "i" 1 SH
S 17 22 suVuQOffset 1 "i" 1 SH
S 18 23 suVuDOffset 1 "i" 1 SH
S 28 42 1 SV
S 16 32 1 SV
S 29 41 1 SV
S 30 suExBSign 1 "o" 47 1 SV
S 31 suExASign 1 "o" 48 1 SV
S 17 18 1 SV
S 18 19 1 SV
S 19 20 1 SV
S 20 16 1 SV
S 27 suVuLsOffsetMux 1 "z" 28 1 SH
N 445 155 "ls_offset" normal CB B
S 29 14 suImmBr 1 "i" 1 SH
S 33 instData 1 "i" 32 1 SH
S 49 35 suRdBMux 2 "i5" 1 SH
S 42 10 suImmLsMux 2 "i1" 1 SH
S 43 10 suImmLsMux 3 "i0" 1 SH
S 38 suPCswizzle 2 "o" 46 1 SH
S 50 35 suRdBMux 3 "i4" 1 SH
S 6 suRFile 3 "b" 35 suRdBMux 7 "i0" 1 SH
N 400 525 "rt" normal CB B
S 51 35 suRdBMux 6 "i1" 1 SH
S 52 35 suRdBMux 5 "i2" 1 SH
S 53 35 suRdBMux 4 "i3" 1 SH
S 43 50 1 SV
S 47 60 1 SV
S 46 59 1 SV
S 48 61 1 SV
S 15 suImmMux 1 "z" 43 1 SH
N 450 275 "imm_data" normal CB B
S 39 37 suImmSxt 1 "i" 1 SH
S 40 39 1 SV
S 41 13 suImmLui 1 "i" 1 SH
S 41 40 1 SV
S 40 12 suImmZxt 1 "i" 1 SH
S 10 suImmLsMux 1 "z" 11 suREinstFF 1 "d" 1 SH
S 11 suREinstFF 2 "q" 45 1 SH
N 835 635 "exImmData" normal CB B
S 49 54 1 SV
S 36 zeros 2 "o" 54 1 SH
S 55 suReBFF 2 "q" 57 1 SH
S 35 suRdBMux 1 "z" 55 suReBFF 1 "d" 1 SH
N 610 475 "rdBSrc" normal CB B
S 57 58 1 SV
S 60 57 1 SV
S 66 shiftAmt 1 "o" 83 1 SV
N 1097 260 "shift_amt" normal LB BV
S 64 suSltLt 1 "o" 62 suSltswizzle 1 "i" 1 SV
S 68 suShift 4 "SEL" 83 1 SH
S 68 suShift 3 "Z" 81 suShEn 1 "i" 1 SH
N 1155 445 "shift_out" normal CB B
S 76 82 1 SV
S 73 suEq 2 "zn" 67 suOnesDet 1 "A" 1 SH
S 62 suSltswizzle 2 "o" 74 1 SV
S 75 suSltEn 2 "z" 76 1 SH
S 74 75 suSltEn 1 "i" 1 SH
S 80 79 suShL31swizzle 1 "i" 1 SH
S 72 suShBMux 1 "z" 68 suShift 1 "B" 1 SH
N 980 405 "shBSrc" normal CB B
S 77 suShAMux 1 "z" 68 suShift 2 "A" 1 SH
N 980 485 "shASrc" normal CB B
S 78 77 suShAMux 3 "i2" 1 SH
S 78 80 1 SV
S 81 suShEn 2 "z" 82 1 SH
S 84 suLoadEn 2 "z" 91 1 SH
S 86 suDriveLS 1 "i" 109 1 SH
S 85 84 suLoadEn 1 "i" 1 SH
S 85 88 1 SV
S 87 storeData 1 "i" 88 1 SH
S 88 86 suDriveLS 2 "z" 1 SH
S 94 89 suRdAMux 2 "i4" 1 SH
S 93 89 suRdAMux 6 "i0" 1 SH
S 95 89 suRdAMux 5 "i1" 1 SH
S 96 89 suRdAMux 4 "i2" 1 SH
S 97 89 suRdAMux 3 "i3" 1 SH
S 91 106 1 SV
S 95 105 1 SV
S 96 108 1 SV
S 97 107 1 SV
S 99 109 1 SV
S 101 110 1 SV
S 91 6 suRFile 1 "d" 1 SH
S 6 suRFile 2 "a" 92 1 SH
N 405 605 "rs" normal CB B
S 92 93 1 SV
S 103 suReAFF 2 "q" 101 1 SH
S 102 103 suReAFF 1 "d" 1 SH
N 610 675 "rdASrc" normal CB B
S 89 suRdAMux 1 "z" 102 1 SH
S 106 107 1 SH
S 123 132 1 SH
S 114 addrSwzl 2 "o" 112 brLdAddr 1 "i" 1 SV
S 123 122 1 SV
S 122 124 1 SV
S 119 114 addrSwzl 1 "i" 1 SV
S 117 suAlu 3 "SO" 120 1 SH
N 1110 695 "alu_out" normal CB B
S 120 119 1 SH
S 119 116 suAluEn 1 "i" 1 SH
S 118 suAluAMux 1 "z" 117 suAlu 1 "A" 1 SH
N 980 715 "aluASrc" normal CB B
S 121 suAluBMux 1 "z" 117 suAlu 2 "B" 1 SH
N 980 635 "aluBSrc" normal CB B
S 116 suAluEn 2 "z" 122 1 SH
S 7 suWbEn 2 "z" 133 1 SH
S 132 8 suEdFF 1 "d" 1 SH
S 8 suEdFF 2 "q" 130 1 SH
S 130 9 suDwFF 1 "d" 1 SH
S 132 111 suExRpt 1 "i" 1 SV
S 133 128 1 SV
S 130 126 1 SV
S 127 128 1 SH
S 9 suDwFF 2 "q" 7 suWbEn 1 "i" 1 SH
S 127 125 suWbRpt 1 "i" 1 SV
E