Makefile 2.02 KB

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#  Verilog source files                             #
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RCPDIR  = ..
SRCDIR  = ../src
RDPDIR  = ../rdp/syn
RSPDIR  = ../rsp/syn

RCP_SRCS =      $(SRCDIR)/rcp.v  \
		$(SRCDIR)/pad.v

IF_EDFS  =	$(RCPDIR)/ai/syn/ai.edf  \
		$(RCPDIR)/ar/syn/arb.edf \
		$(RCPDIR)/si/syn/si.edf  \
		$(RCPDIR)/mi/syn/mi.edf 
IO_EDFS   =	$(RCPDIR)/io/syn/io_cmd_dma.edf \
		$(RCPDIR)/io/syn/io_mem_dma.edf
RI_EDF    =	$(RCPDIR)/ri/syn/ri.edf
SB_EDF    =	$(RCPDIR)/sb/syn/rspbusses.edf

TOP_BLOCKS = 	if_logic.edf \
		io_ri.edf    \
		vclk_driver.edf             \
		syn_clk_buf.edf             \
		$(RSPDIR)/iu.edf            \
		$(RSPDIR)/data_unit.edf     \
		$(RCPDIR)/vu/syn/vusl.edf   \
		$(RCPDIR)/tst/syn/tst.edf   \
		$(RCPDIR)/vu/syn/div.edf    \
		$(RCPDIR)/pi/syn/pi.edf     \
		$(RDPDIR)/tc_logic.edf  \
		$(RDPDIR)/cs_ew_cv.edf  \
		$(RDPDIR)/bl_logic.edf  \
		$(RDPDIR)/memspan.edf   \
		$(RDPDIR)/tm_tf.edf     \
		$(RDPDIR)/cc_logic.edf  \
		$(RCPDIR)/vi/syn/vi.edf

EDF_P = rcp.edf_p if_logic.edf_p io_ri.edf_p

rcp.edf: rcp.ss rcp.edf_p $(TOP_BLOCKS)
	dc_shell -f rcp.ss | tee rcp.synlog

vclk_driver.edf: vclk_driver.ss $(SRCDIR)/vclk_driver.v
	dc_shell -f vclk_driver.ss | tee vclk_driver.synlog

syn_clk_buf.edf: syn_clk_buf.ss $(SRCDIR)/syn_clk_buf.v
	dc_shell -f syn_clk_buf.ss | tee syn_clk_buf.synlog

if_logic.edf: if_logic.ss if_logic.edf_p $(IF_EDFS)
	dc_shell -f if_logic.ss | tee if_logic.synlog

io_ri.edf: io_ri.ss io_ri.edf_p $(RI_EDF) $(IO_EDFS) $(SB_EDF)
	dc_shell -f io_ri.ss | tee io_ri.synlog

$(EDF_P):  $(RCP_SRCS) $(RDPDIR)/rdp.edf_p $(RSPDIR)/rsp.edf_p rcp_partition.ss
	dc_shell -f rcp_partition.ss | tee rcp_partition.synlog

#   block-level makes
check_blocks:
	cd $(RCPDIR)/ai/syn; make -n
	cd $(RCPDIR)/ar/syn; make -n
	cd $(RCPDIR)/vu/syn; make -n div.edf
	cd $(RCPDIR)/si/syn; make -n
	cd $(RCPDIR)/mi/syn; make -n
	cd $(RCPDIR)/tst/syn; make -n
	cd $(RCPDIR)/ri/syn; make -n
	cd $(RCPDIR)/pi/syn; make -n
	cd $(RCPDIR)/vi/syn; make -n