module pc3cl3 (cp, cclk, e, clkpwr, clkgnd);
   input cclk;
   input e;
   output clkpwr;
   output clkgnd;
   supply1 clkpwr;
   supply0 clkgnd;
   output cp;

   wire ce;

   assign ce = cclk ? ce : e;
   and G2 (cp, cclk, ce);

endmodule