module ao06d2 (zn, a1, a2, b1, b2, c1, c2);
   input a1, a2, b1, b2, c1, c2;
   output zn;
   and                  G2(N2, b1, b2),
                        G3(N3, c1, c2);
   not                  G4(zn, N5);
   or                   G5(N5, N6, N2, N3);
   and                  G6(N6, a1, a2);
endmodule