ao07d1.v 217 Bytes Raw Blame History Permalink 1 2 3 4 5 6 7 module ao07d1 (zn, a1, a2, a3, b1, b2); input a1, a2, a3, b1, b2; output zn; and G2(N2, a1, a2, a3), G3(N3, b1, b2); nor G4(zn, N2, N3); endmodule