module xn03d1 (zn, a1, a2, a3);
   input a1, a2, a3;
   output zn;
   or                   G5(N5, a1, N11);
   nand                 G6(N6, a1, N11),
                        G7(zn, N5, N6);
   or                   G9(N9, a2, a3);
   nand                 G10(N10, a2, a3);
   and                  G11(N11, N9, N10);
endmodule