search_path = search_path + "../src" + "../../inc" + \
   "../../../lib/verilog/user" + "../../syn"

/* read the verilog source */

read -f verilog rdp.v

/* read the block-level edifs */
read -f edif ../../at/syn/at.edf
read -f edif ../../bl/syn/bl.edf
read -f edif ../../cc/syn/cc.edf
read -f edif ../../cs/syn/cs.edf
read -f edif ../../cv/syn/cv.edf
read -f edif ../../ep/syn/ep.edf
read -f edif ../../ew/syn/ew.edf
read -f edif ../../ms/syn/ms.edf
read -f edif ../../st/syn/st.edf
read -f edif ../../tc/syn/tc.edf
read -f edif ../../tf/syn/tf.edf
read -f edif ../../tm/syn/tm.edf

current_design = rdp

link 

check_design > rdp.lint

report_reference

/*  Write out edif netlist */

write -f edif -o rdp.edf rdp

quit