tm.ss
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/* Echo start time */
sh "date"
/*****************************************************************************/
/* custom variables */
/*****************************************************************************/
module = "tm"
default_max_transition = 1.5
/*****************************************************************************/
/* set the path and read */
/*****************************************************************************/
search_path = search_path \
+ "../src" \
+ "../../inc" \
+ "../../../lib/verilog/user" \
+ "../../syn"
read -f edif tm_mux1.edf
read -f edif tm_mux2.edf
read -f edif tm_load.edf
read -f edif ram_bist_tmem.edf
read -f verilog tm_half.v
read -f verilog module + ".v"
current_design = tm
/*****************************************************************************/
/* default constraint */
/*****************************************************************************/
set_max_area 0
set_dont_touch { ne35hd130d/nt01d* }
set_max_transition default_max_transition current_design
include "tm.tmg"
/*****************************************************************************/
/* custom constraints */
/*****************************************************************************/
set_output_delay 3.0 -clock clock { clr_ind_a clr_ind_b clr_ind_c clr_ind_d }
set_output_delay 5.0 -clock clock copy_load
/*****************************************************************************/
/* check */
/*****************************************************************************/
link
check_design > module + ".lint"
/*****************************************************************************/
/* compile */
/*****************************************************************************/
group {load, bist, mux1} -design_name tm_logic -cell_name tm_logic
characterize tm_logic
characterize mux2
characterize copy_load_bufs
current_design = tm_logic
set_dont_touch { mux1/u_* }
set_load 2.0 { all_outputs() }
compile -ungroup_all -map_effort high
current_design = tm_mux2
compile -map_effort high -ungroup_all -incremental_mapping
current_design = tm_tbuf64
compile -map_effort high -ungroup_all -incremental_mapping
/*****************************************************************************/
/* write */
/*****************************************************************************/
include "tm.tmg"
include "report.dc"
write -format edif -hierarchy -o module + ".edf" module
write -format db -hierarchy -o module + ".db" module
/* Echo end time */
sh "date"
quit