Makefile 8.92 KB
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#!smake
#
#  This makefile has rules for making both the executables
#  which make up the simulator, and for running test cases.
#
# $Revision: 1.1.1.1 $
#
COMMONPREF=tf
PRDEPTH = ../../..

include $(PRDEPTH)/PRdefs
include $(ROOT)/usr/include/make/ismcommondefs

#
#  Directories
#
SIMLIB		= ../../simlib
SRC    		= ../../src
HDR    		= ../../hdr
WIR    		= Wir
INDATA 		= InData
OUTDATA		= OutData
HW		= $(PRDEPTH)/hw/chip/rcp
HWLIB		= $(PRDEPTH)/hw/chip/lib/verilog
QSIM            = qsim

#
#  Subdirectories
#
SUBDIRS		= $(WIR)

#
#		Look in $(SRC) directory for C-sim source
#
.PATH:		$(SRC)

#
#  C Sources
#
TEST_FILES 	= \
        	$(SRC)/tf.c \
		expand.c \
        	driver.c \
        	tf_test_0.c

#
#  Object Files
#
TEST_OBJ 	= ${TEST_FILES:.c=.o}
TEST_OBJS    	= ${TEST_OBJ:T}

#
#  Header file Directories
#
LCINCS 		= -I. \
	 	-I$(SIMLIB) \
	 	-I$(HDR)

GCINCS 		=

#
#  Linker Directories and Options
# 
LLDOPTS 	= -L. -L$(SIMLIB)
GLDOPTS 	=
LLDLIBS 	= -lsimlib

LVCSOPTS = +incdir+$(PRDEPTH)/hw/chip/rcp/inc

RTLOPTS  = -y $(PRDEPTH)/hw/chip/rcp/tf/src \
	   -y $(PRDEPTH)/hw/chip/lib/verilog/stdcell \
	   -y $(PRDEPTH)/hw/chip/lib/verilog/ram \
	   -v $(PRDEPTH)/hw/chip/lib/verilog/udp/compass_udps.v \
	   +libext+.v+.vzd \
	   -Mdir=rtlcsrc

SYNOPTS  = -y $(PRDEPTH)/hw/chip/rcp/tf/syn \
	   -y $(PRDEPTH)/hw/chip/lib/verilog/stdcell \
	   -y $(PRDEPTH)/hw/chip/lib/verilog/ram \
	   -v $(PRDEPTH)/hw/chip/lib/verilog/udp/compass_udps.v \
	   +libext+.v+.vsyn \
	   -Mdir=syncsrc

#DUMP	 = +dump

#
#  Default Targets
#
RTESTS 	= rtest000 rtest001 rtest002 rtest003 rtest004	\
	  rtest005 rtest006 rtest007 rtest008

STESTS 	= stest000 stest001 stest002 stest003 stest004	\
	  stest005 stest006 stest007 stest008

QTESTS  = qtest000 qtest001 qtest002 qtest003 qtest004  \
          qtest005 qtest006 qtest007 qtest008

FAST 	= fast000 fast001 fast002 fast003 fast004	\
	  fast005 fast006 fast007 fast008

LDIRT   = tf_test tf_test_0.c ${QSIM}/*.tab ${QSIM}/*.sim* ${QSIM}/*.trc* ${QSIM}/*.simlog*

#
#  SGI Common Rules
#
include $(PRDEPTH)/PRrules

#
#  Use HOST compile
#
.c.o:
	$(HOST_CC) $(CFLAGS) -c $*.c

#
#  Choose between first and second tapeout hardware
#
default install rtests: $(_FORCE)
	@if test -n "$(USE_HW_ROOT)"; then \
		exec $(MAKE) HW=hw rtests_hw; \
	else \
		exec $(MAKE) HW=hw2 rtests_hw; \
	fi

stests: $(_FORCE)
	@if test -n "$(USE_HW_ROOT)"; then \
		exec $(MAKE) HW=hw stests_hw; \
	else \
		exec $(MAKE) HW=hw2 stests_hw; \
	fi

qtests:	$(_FORCE)
	@if test -n "$(USE_HW_ROOT)"; then \
		exec $(MAKE) HW=hw qtests_hw; \
	else \
		exec $(MAKE) HW=hw2 qtests_hw; \
	fi

rtests_hw: $(RTESTS)

stests_hw: $(STESTS)

qtests_hw: $(QTESTS)

fast: $(FAST)
	
$(COMMONTARGS): $(COMMONPREF)$$@
	$(SUBDIRS_MAKERULE)
#
#  Target for creating .1 files, Viewlogic Netlists
#
$(WIR)/tf_test.1: $(FORCE)
	cd $(WIR); $(MAKE)

#
#  Compile 'C' processes
#
tf_test_0.c: $(WIR)/tf_test.1 tf_test.config $(XNET)
	$(XNET) -d $(WIR) tf_test -c tf_test.config

tf_test: tf_test_0.c $(SIMLIB) $(TEST_OBJS)
	$(HOST_CC) $(TEST_OBJS) $(LDFLAGS) -o $@ $(LLDLIBS)

#
# Compile Verilog processes
#

driver.v: $(OUTDATA)/tf_all/test000.tab $(TAB2VMEM)
	$(TAB2VMEM) -o /dev/null -s 100 $(OUTDATA)/tf_all/test000.tab > driver.v

rsimv: top_level.v driver.v $(_FORCE)
	$(VCS) $(VCSOPTS) $(RTLOPTS) top_level.v driver.v -o $@

ssimv: top_level.v driver.v $(_FORCE)
	$(VCS) $(VCSOPTS) $(SYNOPTS) top_level.v driver.v -o $@

#
#  Test Targets
#

#
# 000  Sanity Check, run a few simple vectors through to check for
# 000  gross errors.  8/3/94 RJM
#
rtest000: rsimv $(OUTDATA)/tf_all/test000.mem
	rsimv +mem=$(?:S/rsimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

stest000: ssimv $(OUTDATA)/tf_all/test000.mem
	ssimv +mem=$(?:S/ssimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

qtest000: $(_FORCE)
	(cd qsim; make test000.trc)

fast000: $(OUTDATA)/tf_all/test000.mem
	rsimv +mem=$? > $*.out
	$(LOG_ERROR)

$(OUTDATA)/tf_all/test000.tab: tf_test $(INDATA)/inp000.tab \
			       $(OUTDATA)/tf_all/test000.tab.base
	./tf_test -i 0 -o tf_all -t 0 
	cmp -s $@ $@.base

#
# 001  Simple Check, run a few non-trivial vectors through to check for
# 001  simple errors.  9/1/94 RWW
# 001
# 001  Found Rounding mismatch
#
rtest001: rsimv $(OUTDATA)/tf_all/test001.mem
	rsimv +mem=$(?:S/rsimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

stest001: ssimv $(OUTDATA)/tf_all/test001.mem
	ssimv +mem=$(?:S/ssimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

qtest001: $(_FORCE)
	(cd qsim; make test001.trc)

fast001: $(OUTDATA)/tf_all/test001.mem
	rsimv +mem=$? > $*.out
	$(LOG_ERROR)

$(OUTDATA)/tf_all/test001.tab: tf_test $(INDATA)/inp001.tab \
			       $(OUTDATA)/tf_all/test001.tab.base
	./tf_test -i 1 -o tf_all -t 1 
	cmp -s $@ $@.base

#
# 002  Random Coverage Check, run a few random vectors through to check for
# 002  simple errors.  9/1/94 RWW
#
rtest002: rsimv $(OUTDATA)/tf_all/test002.mem
	rsimv +mem=$(?:S/rsimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

stest002: ssimv $(OUTDATA)/tf_all/test002.mem
	ssimv +mem=$(?:S/ssimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

qtest002: $(_FORCE)
	(cd qsim; make test002.trc)

fast002: $(OUTDATA)/tf_all/test002.mem
	rsimv +mem=$? > $*.out
	$(LOG_ERROR)

$(OUTDATA)/tf_all/test002.tab: tf_test $(INDATA)/inp002.tab \
			       $(OUTDATA)/tf_all/test002.tab.base
	./tf_test -i 2 -o tf_all -t 2 
	cmp -s $@ $@.base

#
# 003  More Random Coverage Check, (change pixel values too)
# 003  9/1/94 RWW
#
rtest003: rsimv $(OUTDATA)/tf_all/test003.mem
	rsimv +mem=$(?:S/rsimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

stest003: ssimv $(OUTDATA)/tf_all/test003.mem
	ssimv +mem=$(?:S/ssimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

qtest003: $(_FORCE)
	(cd qsim; make test003.trc)

fast003: $(OUTDATA)/tf_all/test003.mem
	rsimv +mem=$? > $*.out
	$(LOG_ERROR)

$(OUTDATA)/tf_all/test003.tab: tf_test $(INDATA)/inp003.tab \
			       $(OUTDATA)/tf_all/test003.tab.base
	./tf_test -i 3 -o tf_all -t 3 
	cmp -s $@ $@.base

#
# 004  Random Midpoint Check
# 004  Random Pixels (all S+8) and frac {0,1/2} x {0,1/2}
# 004  9/6/94 RWW
#
rtest004: rsimv $(OUTDATA)/tf_all/test004.mem
	rsimv +mem=$(?:S/rsimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

stest004: ssimv $(OUTDATA)/tf_all/test004.mem
	ssimv +mem=$(?:S/ssimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

qtest004: $(_FORCE)
	(cd qsim; make test004.trc)

fast004: $(OUTDATA)/tf_all/test004.mem
	rsimv +mem=$? > $*.out
	$(LOG_ERROR)

$(OUTDATA)/tf_all/test004.tab: tf_test $(INDATA)/inp004.tab \
			       $(OUTDATA)/tf_all/test004.tab.base
	./tf_test -i 4 -o tf_all -t 4 
	cmp -s $@ $@.base

#
# 005  Random Color Convert Check
# 005  Random Pixels (all S+8), fracs (should have no effect)
# 005  and random K's
# 005  9/6/94 RWW
#
rtest005: rsimv $(OUTDATA)/tf_all/test005.mem
	rsimv +mem=$(?:S/rsimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

stest005: ssimv $(OUTDATA)/tf_all/test005.mem
	ssimv +mem=$(?:S/ssimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

qtest005: $(_FORCE)
	(cd qsim; make test005.trc)

fast005: $(OUTDATA)/tf_all/test005.mem
	rsimv +mem=$? > $*.out
	$(LOG_ERROR)

$(OUTDATA)/tf_all/test005.tab: tf_test $(INDATA)/inp005.tab \
			       $(OUTDATA)/tf_all/test005.tab.base
	./tf_test -i 5 -o tf_all -t 5 
	cmp -s $@ $@.base

#
# 006  Two Cycle Mode
# 006  Subpixel filter 1 clock, then color convert the next
# 006  Random Pixels (all S+8), fracs, and K's
# 006  9/7/94 RWW
#
rtest006: rsimv $(OUTDATA)/tf_all/test006.mem
	rsimv +mem=$(?:S/rsimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

stest006: ssimv $(OUTDATA)/tf_all/test006.mem
	ssimv +mem=$(?:S/ssimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

qtest006: $(_FORCE)
	(cd qsim; make test006.trc)

fast006: $(OUTDATA)/tf_all/test006.mem
	rsimv +mem=$? > $*.out
	$(LOG_ERROR)

$(OUTDATA)/tf_all/test006.tab: tf_test $(INDATA)/inp006.tab \
			       $(OUTDATA)/tf_all/test006.tab.base
	./tf_test -i 6 -o tf_all -t 6 
	cmp -s $@ $@.base

#
# 007  Fully Random
# 007  Change all inputs every clock and see
# 007  what chaos results
# 007  9/7/94 RWW
#

rtest007: rsimv $(OUTDATA)/tf_all/test007.mem
	rsimv +mem=$(?:S/rsimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

stest007: ssimv $(OUTDATA)/tf_all/test007.mem
	ssimv +mem=$(?:S/ssimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

qtest007: $(_FORCE)
	(cd qsim; make test007.trc)

fast007: $(OUTDATA)/tf_all/test007.mem
	rsimv +mem=$? > $*.out
	$(LOG_ERROR)

$(OUTDATA)/tf_all/test007.tab: tf_test $(INDATA)/inp007.tab \
			       $(OUTDATA)/tf_all/test007.tab.base
	./tf_test -i 7 -o tf_all -t 7 
	cmp -s $@ $@.base

#
# 008  Two Cycle Mode with Loopback
# 008  Subpixel filter 1 clock, then color convert that pixel
# 008  the next clock.  Random Pixels (all S+8), fracs, and K's
# 008  Random Midpoint mode too.
# 008  9/8/94 RWW
#

rtest008: rsimv $(OUTDATA)/tf_all/test008.mem
	rsimv +mem=$(?:S/rsimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

stest008: ssimv $(OUTDATA)/tf_all/test008.mem
	ssimv +mem=$(?:S/ssimv//) $(DUMP) > $*.out
	$(LOG_RESULT)

qtest008: $(_FORCE)
	(cd qsim; make test008.trc)

fast008: $(OUTDATA)/tf_all/test008.mem
	rsimv +mem=$? > $*.out
	$(LOG_ERROR)

$(OUTDATA)/tf_all/test008.tab: tf_test $(INDATA)/inp008.tab \
			       $(OUTDATA)/tf_all/test008.tab.base
	./tf_test -i 8 -o tf_all -t 8 
	cmp -s $@ $@.base