/*************************************************************************
 *								         *
 *               Copyright (C) 1994, Silicon Graphics, Inc.       	 *
 *								         *
 *  These coded instructions, statements, and computer programs  contain *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and *
 *  are protected by Federal copyright  law.  They  may not be disclosed *
 *  to  third  parties  or copied or duplicated in any form, in whole or *
 *  in part, without the prior written consent of Silicon Graphics, Inc. *
 *								         *
 ************************************************************************/

/*
 * File:		aresample.s
 * Creator:		byron@sgi.com
 * Create Date:		10/18/94
 *
 * Contains the commands: A_RESAMPLE
 * 
 */
 
/* macros to clarify accum result storage */
#define rs_vstorem(x) vmadm x, vONE, vSHIFT[0]
#define rs_vstoren(x) vmadn x, vONE, vSHIFT[0]

/* These define should be in abi.h with the resample state struct
	definition */
#define PHASE_SIZE		(4)
#define ZMEMSIZE		(PHASE_SIZE * BYTES_PER_SHORT)

#define RES_STATE_BASE		(0)
#define ZMEM_OFFSET		(RES_STATE_BASE)
#define FCA_OFFSET		(ZMEM_OFFSET + ZMEMSIZE)
#define EXTRA_OFFSET		(FCA_OFFSET + BYTES_PER_SHORT)
#define SAMPLES_OFFSET		(16)
#define RES_STATE_TOP		(SAMPLES_OFFSET + 8*BYTES_PER_SHORT)
/*
 * RES_STATE_SIZE8 must be less than, or equal to 16
 */
#define RES_STATE_SIZE8 	(RES_STATE_TOP - RES_STATE_BASE - 1)
#define RES_STATE_PAD		(32 - RES_STATE_SIZE8 - 1)

/*
 * scratch memory variable
 * ICA and CPH must be on 16 byte boundaries
 */
#define ICA_OFFSET		(RES_STATE_TOP + RES_STATE_PAD)
#define CPH_OFFSET		(ICA_OFFSET + BYTES_PER_VECTOR)
#define STATE_OFFSET		(CPH_OFFSET + BYTES_PER_VECTOR)

/* define elements in the channel parameter vector (vchparmz) */
#define	SBASE	2
#define	CBASE	3
#define	PINC	4
#define	PHCNT	5

#define	SBASEb	4
#define	CBASEb	6
#define	PINCb	8
#define	PHCNTb	10


 ########################################################################
 #
 # resample data in dmemin to dmemout using
 #

.name	iCAptr,		$21	# addr of int CA vector
.name	CPHptr,		$20	# addr of current phase address vector
.name	OutPtr,		$19	# pointr to output data
.name	loopctl,	$18	# pointr to output data

.name	vONE,		$v31
.name	vSHIFT,		$v30
.name	vZEROFOUR,	$v29
.name	vONEFIVE,	$v28
.name	vTWOSIX,	$v27
.name	vTHREESEVEN,	$v26
.name	vMULINC,	$v25	#
.name	vRAMP,		$v24	# linear volume ramp
.name	vfco,		$v23	# fractional current offset
.name	vico,		$v22	# integer current offset
.name	vica,		$v21	# integer current base address
.name	vchparmz,	$v18	# volume target, rate, sound base, coef base
				# pitch increment, phase multiplier
.name	vphaddr,	$v17	# vector of phase addresses
.name	vdata0,		$v16	# data vector 0
.name	vcoef0,		$v15	# coef vector 0
.name	vdata1,		$v14	# data vector 1
.name	vcoef1,		$v13	# coef vector 1
.name	vdata2,		$v12	# data vector 2
.name	vcoef2,		$v11	# coef vector 2
.name	vdata3,		$v10	# data vector 3
.name	vcoef3,		$v9	# coef vector 3
.name	vout0,		$v8
.name	vout1,		$v7
.name	vout2,		$v6
.name	vout3,		$v5
.name	vout,		$v4
.name	vtemp0,		$v3
.name	vtemp1,		$v2
.name	vtemp2,		$v1
.name	vtemp3,		$v0

.name dm_state_addr,	$1
.name state_addr,	$2
.name count,		$3
.name mask,		$4
.name seg_id,		$5
.name seg_addr,		$6
.name flags,		$7
.name inbuffbase,	$8
.name constbase,	$9
.name temp,		$10
.name extra,		$11

case_A_RESAMPLE:

	lh	inbuffbase, RSP_PARAMETER_DMEMIN(parbase)
	lh	OutPtr, RSP_PARAMETER_DMEMOUT(parbase)
	lh	loopctl, RSP_PARAMETER_COUNT(parbase)

	#
	# set up state memory dma addresses
	#
	lui	mask, 0x00ff
	ori	mask, mask, 0xffff
	and	state_addr, aud1, mask
	srl	seg_id, aud1, 24	# must clear bits
	sll	seg_id, seg_id, 2	# leave mult. by 4 for offset
	lw	seg_addr, RSP_SEG_OFFSET(seg_id)
	add	state_addr, state_addr, seg_addr
	addi	dm_state_addr, scrbase, RES_STATE_BASE
	sw	state_addr, STATE_OFFSET(scrbase)
	addi	count, zero, RES_STATE_SIZE8

	#
	# check if A_INIT flag is set
	#
	srl	flags, aud0, 16
	andi	temp, flags, A_INIT
	bgtz	temp, res_dont_init_from_state
	nop

	#
	# A_INIT is clear, do the dma...
	#
	jal	DMAread
	nop

RESAMPLEwait1:	
	mfc0	$1, DMA_BUSY
	bne	$1, zero, RESAMPLEwait1
	nop
	j	load_parameters
 # release the semaphore
	mtc0	$0, SP_RESERVED

	#
	# A_INIT is set, initialize state memory
	# and fall through to same code as if
	# A_INIT were clear
	#
res_dont_init_from_state:
	sh	zero, FCA_OFFSET(scrbase)
	vxor	vdata0, vdata0, vdata0	# just using vdata0 as a scratch vector
	sdv	vdata0[0], ZMEM_OFFSET(scrbase)

	#
	# load state memory parameters
	#
load_parameters:
	andi	temp, flags, A_OUT
	beq	temp, zero, rs_noextra
	nop
	lh	extra, EXTRA_OFFSET(scrbase)
	lqv	vtemp0[0], SAMPLES_OFFSET(scrbase)
	sdv	vtemp0[0], -16(inbuffbase)
	sdv	vtemp0[8], -8(inbuffbase)
	sub	inbuffbase, inbuffbase, extra
rs_noextra:
	addi	inbuffbase, -ZMEMSIZE
	lsv	vfco[14], FCA_OFFSET(scrbase)
	ldv	vdata0[0], ZMEM_OFFSET(scrbase)
	sdv	vdata0[0], 0(inbuffbase)

	#
	# load volume and buffer pointer parameters
	#
	mtc2	inbuffbase, vchparmz[SBASEb]		# load base of input
	addi	temp, zero, RES_TABLE_OFFSET
	mtc2	temp, vchparmz[CBASEb]			# load base of coef tab
	
	mtc2	aud0, vchparmz[PINCb]			# load pitch increment
	addi	temp, zero, RES_PHASE_COUNT
	mtc2	temp, vchparmz[PHCNTb]			# load coef phase count

	#
	# load constants from PDATA...
	#
	addi	constbase, zero, RES_CONST_OFFSET
	lqv	vONE[0], C_ONE(constbase)
	lqv	vMULINC[0], C_MULINC(constbase)
	#
	# on first pass, we want MULINC to be 0-7 ( <<1 )
	# later we'll reload 1-8 ( << 1 )
	#
	vsub	vMULINC, vMULINC, vONE
	lqv	vSHIFT[0], C_SHIFT(constbase)
	lqv	vZEROFOUR[0], C_ZEROFOUR(constbase)
	lqv	vONEFIVE[0], C_ONEFIVE(constbase)
	lqv	vTWOSIX[0], C_TWOSIX(constbase)
	lqv	vTHREESEVEN[0], C_THREESEVEN(constbase)
	vsub	vMULINC, vMULINC, vONE
 	lqv	vRAMP[0], C_RAMP(constbase)

	addi	iCAptr, scrbase, ICA_OFFSET
	addi	CPHptr, scrbase, CPH_OFFSET

	#
	# calculate first set of data and coef addresses..
	vxor	vico, vico, vico
incCA:	vmudm	vfco, vONE, vfco[7]		# init vector vfco with current value
	vmadm	vico, vMULINC, vchparmz[PINC]	# inc current offset 8 times
	rs_vstoren(vfco)

	vmudn	vica, vONE, vchparmz[SBASE]	# load sound base address into acc[31-16]
	vmadn	vica, vico, vSHIFT[2]		# base address + (current offset << 2)
	
incPH:	vmudl	vphaddr, vfco, vchparmz[PHCNT]	# find initial phase addr
	vmudn	vphaddr, vphaddr, vSHIFT[4]
	vmadn	vphaddr, vONE, vchparmz[CBASE]	# add base coef table addr

	# reload MULINC..
	lqv	vMULINC[0], C_MULINC(constbase)

stAddr:	sqv	vica[0], 0(iCAptr)
	sqv	vphaddr[0], 0(CPHptr)
	ssv	vfco[7], FCA_OFFSET(scrbase)

.unname mask
.unname seg_id
.unname seg_addr
.unname	count
.unname	state_addr
.unname	flags
.unname	dm_state_addr
.unname	temp
.unname inbuffbase
.unname	constbase
.unname extra

.name	CAptr0,		$17
.name	CAptr2,		$16
.name	CAptr4,		$15
.name	CAptr6,		$14
.name	CAptr8,		$13
.name	CAptr10,	$12
.name	CAptr12,	$11
.name	CAptr14,	$10
.name	PHptr0,		$9
.name	PHptr2,		$8
.name	PHptr4,		$7
.name	PHptr6,		$6
.name	PHptr8,		$5
.name	PHptr10,	$4
.name	PHptr12,	$3
.name	PHptr14,	$2

	
					lh	CAptr0, 0(iCAptr)
					lh	PHptr0, 0(CPHptr)
					lh	CAptr8, 8(iCAptr)
					lh	PHptr8, 8(CPHptr)
					lh	CAptr2, 2(iCAptr)
					lh	PHptr2, 2(CPHptr)
					lh	CAptr10, 10(iCAptr)
					lh	PHptr10, 10(CPHptr)
					lh	CAptr4, 4(iCAptr)
					lh	PHptr4, 4(CPHptr)
					lh	CAptr12, 12(iCAptr)
					lh	PHptr12, 12(CPHptr)
					lh	CAptr6, 6(iCAptr)
					lh	PHptr6, 6(CPHptr)
					lh	CAptr14, 14(iCAptr)
					lh	PHptr14, 14(CPHptr)
	
 # -------------------------------------------------------------------------
 # note that the address increment stuff (from incCA above) is mostly
 # duplicated in the main loop below to take advantage of cp parallelism
loop:					ldv	vdata0[0], 0(CAptr0)
	vmudm	vfco, vONE, vfco[7]		
					ldv	vcoef0[0], 0(PHptr0)
	vmadh	vfco, vONE, vico[7]		
					ldv	vdata0[8], 0(CAptr8)
	vmadm	vico, vMULINC, vchparmz[PINC]	
					ldv	vcoef0[8], 0(PHptr8)
	rs_vstoren(vfco)
					ldv	vdata1[0], 0(CAptr2)
	vmudn	vica, vONE, vchparmz[SBASE]		
					ldv	vcoef1[0], 0(PHptr2)
	vmadn	vica, vico, vSHIFT[2]		
					ldv	vdata1[8], 0(CAptr10)
	vmudl	vphaddr, vfco, vchparmz[PHCNT]	
					ldv	vcoef1[8], 0(PHptr10)
					ldv	vdata2[0], 0(CAptr4)
					ldv	vcoef2[0], 0(PHptr4)
					ldv	vdata2[8], 0(CAptr12)
	vmudn	vphaddr, vphaddr, vSHIFT[4]
					ldv	vcoef2[8], 0(PHptr12)
					ldv	vdata3[0], 0(CAptr6)
					ldv	vcoef3[0], 0(PHptr6)
	vmadn	vphaddr, vONE, vchparmz[CBASE]
					ldv	vdata3[8], 0(CAptr14)
	vmulf	vout0, vdata0, vcoef0	
					ldv	vcoef3[8], 0(PHptr14)
	vmulf	vout1, vdata1, vcoef1
					sqv	vica[0], 0(iCAptr)
	vmulf	vout2, vdata2, vcoef2
					sqv	vphaddr[0], 0(CPHptr)
					lh	CAptr0, 0(iCAptr)
	vmulf	vout3, vdata3, vcoef3
					lh	PHptr0, 0(CPHptr)
	vadd	vout0, vout0, vout0[1q]
					lh	CAptr8, 8(iCAptr)
	vadd	vout1, vout1, vout1[1q]
					lh	PHptr8, 8(CPHptr)
	vadd	vout2, vout2, vout2[1q]
					lh	CAptr2, 2(iCAptr)
	vadd	vout3, vout3, vout3[1q]
					lh	PHptr2, 2(CPHptr)
	vadd	vout0, vout0, vout0[2h]
					lh	CAptr10, 10(iCAptr)
	vadd	vout1, vout1, vout1[2h]
					lh	PHptr10, 10(CPHptr)
	vadd	vout2, vout2, vout2[2h]
					lh	CAptr4, 4(iCAptr)
	vadd	vout3, vout3, vout3[2h]
					lh	PHptr4, 4(CPHptr)
	vmudn	vout, vZEROFOUR, vout0[0h]
					lh	CAptr12, 12(iCAptr)
	vmadn	vout, vONEFIVE, vout1[0h]
					lh	PHptr12, 12(CPHptr)
	vmadn	vout, vTWOSIX, vout2[0h]
					lh	CAptr6, 6(iCAptr)
	vmadn	vout, vTHREESEVEN, vout3[0h]
					lh	PHptr6, 6(CPHptr)
					lh	CAptr14, 14(iCAptr)
					addi	loopctl, loopctl, -16
					sqv	vout[0], 0(OutPtr)
					blez	loopctl, fini
					lh	PHptr14, 14(CPHptr)
					j	loop
					addi	OutPtr, OutPtr, 0x10

fini:	#
	# next fractional current offset is already
	# in vfco; save it for next time
	#
	ssv	vfco[0], FCA_OFFSET(scrbase)

	#
	# now save the first data vector from that offset
	#
	ldv	vdata0[0], 0(CAptr0)
	sdv	vdata0[0], ZMEM_OFFSET(scrbase)

.unname	CAptr2
.unname	CAptr4
.unname	CAptr6
.unname	CAptr8
.unname	CAptr10
.unname	CAptr12
.unname	CAptr14
.unname	PHptr0
.unname	PHptr2
.unname	PHptr4
.unname	PHptr6
.unname	PHptr8
.unname	PHptr10
.unname	PHptr12
.unname	PHptr14

.name dm_state_addr,	$1
.name state_addr,	$2
.name ssize,		$3
.name extra,		$4
.name samples_used, 	$5
.name inbuffbase,	$6
.name sixteen,		$7

	lh	inbuffbase, RSP_PARAMETER_DMEMIN(parbase)
	addi	CAptr0, CAptr0, 8
	sub	samples_used, CAptr0, inbuffbase
	andi	extra, samples_used, 0xf
	sub	CAptr0, CAptr0, extra		# To get alignment of samples
	beq	extra, zero, rs_none
	addi	sixteen, zero, 16
	sub	extra, sixteen, extra
rs_none:
	sh	extra, EXTRA_OFFSET(scrbase)
	ldv	vtemp0[0], 0(CAptr0)
	ldv	vtemp0[8], 8(CAptr0)
	sqv	vtemp0[0], SAMPLES_OFFSET(scrbase)

	lw	state_addr, STATE_OFFSET(scrbase)
	addi	dm_state_addr, scrbase, RES_STATE_BASE
	jal	DMAwrite
	addi	ssize, zero, RES_STATE_SIZE8
	

.unname	CAptr0
.unname	ssize
.unname	state_addr
.unname	dm_state_addr
.unname extra
.unname samples_used
.unname inbuffbase
.unname sixteen

RESAMPLEwait2:	
	mfc0	$5, DMA_BUSY
	bne	$5, zero, RESAMPLEwait2
	nop
	j	AudDone
 # release the semaphore
	mtc0	$0, SP_RESERVED

.unname	CPHptr
.unname	iCAptr
.unname	OutPtr
.unname	loopctl

.unname	vONE
.unname	vSHIFT
.unname	vZEROFOUR
.unname	vONEFIVE
.unname	vTWOSIX
.unname	vTHREESEVEN
.unname	vMULINC
.unname	vRAMP
.unname	vfco
.unname	vico
.unname	vica
.unname	vchparmz
.unname	vphaddr
.unname	vdata0
.unname	vcoef0
.unname	vdata1
.unname	vcoef1
.unname	vdata2
.unname	vcoef2
.unname	vdata3
.unname	vcoef3
.unname	vout0
.unname	vout1
.unname	vout2
.unname	vout3
.unname	vout
.unname	vtemp0
.unname	vtemp1
.unname	vtemp2
.unname	vtemp3