ewscy.v
4.74 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
*************************************************************************/
// $Id: ewscy.v,v 1.2 2002/11/22 00:34:20 rws Exp $
/////////////////////////////////////////////////////////////////////////
//
// Project Reality
//
// module: ewscy
// description: counts and scissors y coordinate with 2-subpixel
//
//
// designer: Mike M. Cai 6/20/94
//
/////////////////////////////////////////////////////////////////////////
module ewscy( equal_ym, //equal_ymint, equal_ymfrc,
end_prim_y,
xval, allx_invalid, y_invalid,
yh_2ms, y_cur_lsb, y_dither,
cs_ew_d, ld_y,
scbox_ymax, scbox_ymin,
count_y, shift_xval, load_cmd, flush, edge_cross, sel_xval,
sc_field, clk, start_gclk);
output equal_ym;// equal_ymint, equal_ymfrc;
output end_prim_y, allx_invalid , y_invalid;
output [3:0] xval;
output [11:0] yh_2ms;
output y_cur_lsb;
output [1:0] y_dither;
input [63:0] cs_ew_d;
input ld_y;
input [11:0] scbox_ymax, scbox_ymin;
input count_y, shift_xval,load_cmd, flush, edge_cross;
input sel_xval, sc_field, clk, start_gclk;
// registers
reg [13:0] ym, yl, yh;
reg [13:0] y_cur;
wire [11:0] yh_2ms;
wire y_cur_lsb;
// y count incrementer
wire [13:0] sum;
// determining to switch from ym to yl
wire equal_ym, equal_ymint, equal_ymfrc;
// scissor with scbox_ymax and determine end of primitive
reg yl_ismin_scymax;
wire [13:0] min_yl_scymax;
wire end_prim_y;
// scisor with scbox_ymin and determine invalid subpixel spans
reg yh_ismax;
wire [13:0] max_yh_scmin;
wire x_invalid;
// xval
reg [3:0] xval;
wire allx_invalid;
reg y_invalid;
reg [1:0] y_dither_m, y_dither;
always @(posedge clk)
if (start_gclk) begin
ym <= ld_y ? cs_ew_d[29:16] : ym;
yl <= ld_y ? cs_ew_d[45:32] : yl;
yh <= ld_y ? cs_ew_d[13:0] : yh;
y_cur <= ld_y ? {cs_ew_d[13:2], 2'h0} : sum; // starting from a scan-line
y_dither_m <= sc_field ? y_cur[4:3] : y_cur[3:2];
y_dither <= sel_xval ? y_dither_m : y_dither;
end
assign yh_2ms = y_cur[13:2];
assign y_cur_lsb = y_cur[2];
// assign y_dither[1:0] = y_cur[3:2];
// counter increment
ewscyinc14b increment (.sum(sum), .a(y_cur), .ci(count_y));
// compare current y with ym to switch from ym to yl
assign
equal_ymint = (ym[13:2] == y_cur[13:2]),
equal_ymfrc = ym[1:0] == y_cur[1:0],
equal_ym = equal_ymint & equal_ymfrc;
// min(yl, scbox_ymax) to determine the end of primitive
always @(yl or scbox_ymax)
begin
if (yl[13])
yl_ismin_scymax = 1'b1;
else if (yl[12])
yl_ismin_scymax = 1'b0;
else
yl_ismin_scymax = yl[11:0] < scbox_ymax;
end
assign min_yl_scymax = (yl_ismin_scymax | load_cmd) ? yl : {2'b0,scbox_ymax};
// Terminate primitive if current y >= min(yl, scbox_ymax)
// assign end_prim_y = ({~y_cur[13],y_cur[12:0]} >= {~min_yl_scymax[13], min_yl_scymax[12:0]})
// | flush | (edge_cross & ~x_invalid);
assign end_prim_y = ({~y_cur[13],y_cur[12:0]} >= {~min_yl_scymax[13],min_yl_scymax[12:0]})
| flush;
// cancel the span if current y < max(scbox_ymin, yh)
always @( yh or scbox_ymin)
begin
if (yh[13])
yh_ismax = 1'h0;
else if (yh[12])
yh_ismax = 1'h1;
else
yh_ismax = yh >= scbox_ymin;
end
assign max_yh_scmin = (yh_ismax | load_cmd) ? yh : {2'h0, scbox_ymin};
assign x_invalid = {~y_cur[13],y_cur[12:0]} < {~max_yh_scmin[13], max_yh_scmin[12:0]}
| edge_cross ;
assign allx_invalid = ~(|xval);
// get xval
// shift == count_y
always @(posedge clk)
if (start_gclk) begin
xval[0] <= shift_xval ? ~( end_prim_y | x_invalid) : xval[0];
xval[1] <= shift_xval ? xval[0] : xval[1];
xval[2] <= shift_xval ? xval[1] : xval[2];
xval[3] <= shift_xval ? xval[2] : xval[3];
y_invalid <= end_prim_y | x_invalid;
end
endmodule // ewscy