rsp_dummy.v
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// rsp_dummy.v v1 Frank Berndt
// rsp dummy for speeding up the simulator;
// using rsp_dummy will hang the simulator;
// :set tabstop=4
`timescale 1ns/1ns
module rsp_dummy (
clk, reset_l,
sp_cbus_read_enable, sp_cbus_write_enable, mem_cbus_write_enable,
cmd_cbus_read_enable, cmd_cbus_write_enable,
cbus_select, cbus_command,
dma_start, dma_last, sp_dma_grant, sp_read_grant, cmd_dma_grant,
cmd_read_grant, sp_dbus_read_enable, sp_dbus_write_enable, cbuf_ready,
cmd_busy, pipe_busy, tmem_busy,
sp_dma_request, sp_read_request, mem_read_request,
cmd_dma_request, cmd_read_request, flush, freeze, unfreeze, frozen,
sp_interrupt, cbuf_write, xbus_data, cbus_din, cbus_dout,
dbus_din, dbus_dout
);
input clk;
input reset_l;
input frozen;
input sp_cbus_read_enable;
input sp_cbus_write_enable;
input mem_cbus_write_enable;
input cmd_cbus_read_enable;
input cmd_cbus_write_enable;
input [1:0] cbus_select;
input [2:0] cbus_command;
input dma_start;
input dma_last;
input sp_dma_grant;
input sp_read_grant;
input cmd_dma_grant;
input cmd_read_grant;
input sp_dbus_read_enable;
input sp_dbus_write_enable;
input cbuf_ready;
input cmd_busy;
input pipe_busy;
input tmem_busy;
input [31:0] cbus_din;
output [31:0] cbus_dout;
input [63:0] dbus_din;
output [63:0] dbus_dout;
output sp_dma_request;
output sp_read_request;
output mem_read_request;
output cmd_dma_request;
output cmd_read_request;
output cbuf_write;
output flush;
output freeze;
output unfreeze;
output sp_interrupt;
output [63:0] xbus_data;
initial
$display("%M: rsp not compiled in");
assign sp_dma_request = 0;
assign sp_read_request = 0;
assign mem_read_request = 0;
assign cmd_dma_request = 0;
assign cmd_read_request = 0;
assign cbuf_write = 0;
assign flush = 0;
assign freeze = 0;
assign unfreeze = 0;
assign sp_interrupt = 0;
assign xbus_data = {64{1'bx}};
assign cbus_dout = 32'b0;
assign dbus_dout = 64'b0;
endmodule