vi_lerp.v 2.03 KB
/**************************************************************************
 *                                                                        *
 *               Copyright (C) 1994, Silicon Graphics, Inc.               *
 *                                                                        *
 *  These coded instructions, statements, and computer programs  contain  *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and  *
 *  are protected by Federal copyright  law.  They  may not be disclosed  *
 *  to  third  parties  or copied or duplicated in any form, in whole or  *
 *  in part, without the prior written consent of Silicon Graphics, Inc.  *
 *                                                                        *
 *************************************************************************/

// $Id: vi_lerp.v,v 1.1 2002/05/21 23:55:45 berndt Exp $

////////////////////////////////////////////////////////////////////////
//
// Project Reality
//
// module:	vi_lerp
// description:	Resampling lerp for video interface.
//
// designer:	Phil Gossett
// date:	11/30/94
//
////////////////////////////////////////////////////////////////////////

module vi_lerp (vclk, frac, rgb_a, rgb_b, sync_b, lerp_rgb, lerp_sync);

input vclk;
input [4:0] frac;
input [7:0] rgb_a;
input [7:0] rgb_b;
input sync_b;

output [7:0] lerp_rgb;
output lerp_sync;

wire [7:0] csa;

wire [5:0] p0p;	// pseudo-booth encoded partial products
wire [5:0] p1p;
wire [5:0] p2p;
wire [5:0] p3p;
wire [5:0] p4p;
wire [5:0] p5p;
wire [5:0] p6p;
wire [5:0] p7p;

reg [7:0] lerp_rgb;
reg lerp_sync;

vi_lerp_booth vlbooth (.x(rgb_b), .y(rgb_a), .a(frac),
	.p0p(p0p), .p1p(p1p), .p2p(p2p), .p3p(p3p), 
	.p4p(p4p), .p5p(p5p), .p6p(p6p), .p7p(p7p));

vi_lerp_csa vlcsa (.a(frac),
	.p0p(p0p), .p1p(p1p), .p2p(p2p), .p3p(p3p),
	.p4p(p4p), .p5p(p5p), .p6p(p6p), .p7p(p7p),
	.c(rgb_a), .mp(csa));

always @(posedge vclk)
begin
	lerp_rgb <= sync_b ? {(rgb_a[7] || rgb_b[7]), rgb_b[6:0]} :
			     ((frac == 0) ? rgb_a : csa);
	lerp_sync <= sync_b;
end

endmodule // vi_lerp