TBGTLAHORCLX2.v
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// VERSION:1.00 DATE:2002/05/13 OPENCAD Verilog LIBRARY
`timescale 1ps / 1ps
`celldefine
`ifdef verifault
`suppress_faults
`enable_portfaults
`endif
module TBGTLAHORCLX2 ( N01, H01, H02 );
input H01;
input H02;
output N01;
reg notifier;
// Dummy Buffer
buf ( _H01, H01 );
buf ( _H02, H02 );
DLSFQ ( _enl, _H01, _H02, 1'b1, 1'b1, notifier );
not ( _enlB, _enl );
or ( N01, _enlB, _H02 );
specify
specparam DMY_SPC=1:1:1;
$setup ( posedge H01, negedge H02, DMY_SPC, notifier );
$setup ( negedge H01, negedge H02, DMY_SPC, notifier );
$hold ( negedge H02, posedge H01, DMY_SPC, notifier );
$hold ( negedge H02, negedge H01, DMY_SPC, notifier );
$width ( posedge H02, DMY_SPC, 0, notifier );
( H02 *> N01 ) = ( DMY_SPC, DMY_SPC );
endspecify
endmodule
`ifdef verifault
`nosuppress_faults
`disable_portfaults
`endif
`endcelldefine