usb_bb_term.v
3.54 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
//**************************************************************************************
//
// Model Name : usb_bb_term.v
// Revision : $Revision: 1.8 $
// Date : $Date: 2003/01/18 00:05:43 $
// Author : Bill Saperstein
// Description : USB termination block to interface to bb chip
//
//**************************************************************************************
//**************************************************************************************
// Module Definition
//**************************************************************************************
module usb_bb_term
(
// Inputs
usb_dp_high ,
usb_d_low_n ,
usb_vbus_on ,
tb_is_device ,
tb_is_disconnect ,
// Outputs
usb_id ,
usb_sess_vld ,
bb_device ,
bb_is_disconnect ,
// Bi-directionals
dplus ,
dminus
) ;
//**************************************************************************************
// Define Parameters (optional)
//**************************************************************************************
//**************************************************************************************
// Port Declarations
//**************************************************************************************
input
usb_dp_high, usb_d_low_n, usb_vbus_on, tb_is_device,
tb_is_disconnect ;
output
usb_id, usb_sess_vld, bb_device, bb_is_disconnect ;
inout
dplus, dminus ;
//**************************************************************************************
// Net Assignments and Declarations
//**************************************************************************************
reg bb_slave, cbl_connect ;
wire slave, connect ;
pullup(usb_d_low_n) ;
pulldown(usb_dp_high) ;
//**************************************************************************************
// Pre-Defined Module Instantiations
//**************************************************************************************
// Not Applicable
//**************************************************************************************
// Gate and Structural Declarations
//**************************************************************************************
//*** the ipc environment needs to set the bb_slave register and
// cbl_connect register to configure the termination block
// these registers can be written whenever the OTG mode changes
// or the cable is connected/disconnected
//*** define the usb_id, sess_vld outputs
assign
slave = bb_slave | ~tb_is_device ,
connect = cbl_connect ,
usb_id = ~(connect) | slave ,
usb_sess_vld = (slave & connect & ~tb_is_disconnect) | (usb_vbus_on & ~slave) ,
bb_device = slave ,
bb_is_disconnect = ~connect ;
//*** define the resistor terminations
bufif1 (pull1,highz0)
g1 (dplus,1'b1,usb_dp_high) ;
bufif0 (highz1,weak0)
g2 (dplus,1'b0,usb_d_low_n) ,
g3 (dminus,1'b0,usb_d_low_n) ;
//**************************************************************************************
// Procedural Assignments
//**************************************************************************************
//*** set initial conditions
initial
begin
bb_slave <= 1'b1 ;
cbl_connect <= 1'b1 ;
end
//**************************************************************************************
// Task and Function Definitions
//**************************************************************************************
// Not Applicable
//**************************************************************************************
// End of Model
//**************************************************************************************
endmodule // usb_term