NMS_tb.v
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//==================================================================
// ========== TestBench for NOVeA Memory System =========== QWEYTRy
// Version 00.29'
//==================================================================
/*
`include "nvrm_nc15gfh_16x32.v"
`include "nvcp_nc15gfh.v"
`include "nvco_nc15gfh_16x32.v"
`include "nms_nc15gfh_16x32.v"
*/
`resetall
`timescale 1 ns / 10 ps
// `define POST_SYNTH
`define NMS_NAME nms_nc15gfh_16x32 /*NMS Name*/
`define NB 32 /*Number of Bits*/
`define NW 16 /*Number of Words*/
`define ADR_MSB 3 /*Address Bus MSB*/
`define STORSC 2 /*STORe Success Count*/
// -------------------------------------------------------------------------
`define WIR_MSB 50 /*WIR MSB*/
`define INSTR_MSB 5 /*Instruction MSB*/
`define PAR_I_MSB 2 /*Parallel Instruction MSB*/
`define CFG_MSB 44 /*Configuration Code MSB*/
`define NOVEA_INST U_NMS.U_NOVEA
// ---------------- Instructions -----------------
`define I_BYPASS 6'd0
`define I_IDLE `I_BYPASS
`define I_SERIAL 6'd1
`define I_FULL_STORE 6'd2
`define I_NRECALL 6'd3
`define I_NCOMPARE 6'd4
`define I_KEEP 6'd5
`define I_RECALLAM 6'd6
`define I_SOFT_STORE 6'd8
`define I_MRECALL 6'd9
`define I_MCOMPARE 6'd10
`define I_SER_LOOP 6'd11
`define I_AUTO_SHIFT 6'd12
`define I_RESET 6'd63
`define FSTORE_DEF_CFG 45'b010101_010110_011001_011010_010000_001_00_10_0000_00_01
// `define CFG_CODE `FSTORE_DEF_CFG
// -------------------------------------------------------------------------
`define PAR_LOAD 1'b1
`define SER_LOAD 1'b0
`ifdef POST_SYNTH
`else
`define PRE_SYNTH
`endif
// -------------------- NMS_tb -------------------
module NMS_tb;
// ----------- Regs --------------
reg SYS_CK;
reg TIME_B;
reg WRCK;
reg WRSTN ;
reg WSI;
reg UpdateWR;
reg ShiftWR;
reg SelectWIR;
reg ME_p;
reg WE_p;
reg OE_p;
reg RA_p;
reg [`NB-1:0] D_p;
reg [`ADR_MSB:0] ADR_p;
reg PAE_p ;
reg [`PAR_I_MSB:0] PA_p;
reg [`NB-1:0] MemArray [`NW-1:0];
reg [`NB-1:0] TempWord;
reg WRCK_Enable;
reg [`CFG_MSB:0] ConfigCode;
reg [`CFG_MSB:0] ConfigCode_Array [3:0];
reg WatchDog_Rst_Occured;
reg Testing_WatchDog;
reg Testing_Reset;
reg InstrLoad_Mode;
reg plus_max_cover_1;
reg [16*8-1:0] TestName;
integer TestNum;
integer Fails; // Total Unexpected Fail Count
integer ExpectedFails; // Total Expected Fail Count
integer IncorrCells;
integer StorePulse_Count;
time Time_STORE_rise;
time Time_PE_rise;
time Time_VPP_rise;
time Width_STORE;
time Width_PE;
time Width_VPP;
// ----------- Wires --------------
wire [`NB-1:0] Q;
// -------- NOVeA Memory System Instantiation -----
`NMS_NAME U_NMS(
.SYS_CK(SYS_CK),
.TIME_B(TIME_B),
.WRSTN(WRSTN),
.WRCK(WRCK),
.WSI(WSI),
.UpdateWR(UpdateWR),
.ShiftWR(ShiftWR),
.SelectWIR(SelectWIR),
.ADR_p(ADR_p),
.D_p(D_p),
.WE_p(WE_p),
.ME_p(ME_p),
.OE_p(OE_p),
.PAE_p(PAE_p),
.PA_p(PA_p),
.RA_p(RA_p),
.WSO(WSO),
.Q(Q),
.NMS_READY(NMS_READY),
.NMS_PASS(NMS_PASS),
.KEEP_ON(KEEP_ON)
);
// ------------------ Clock Generators ----------------
initial
begin
#2 SYS_CK = 0;
forever #4.98 SYS_CK = ~SYS_CK;
end
initial
begin
#4 WRCK = 0;
forever #199.17 if (WRCK_Enable) WRCK = ~WRCK;
end
initial
begin
TIME_B = 0;
`ifdef VIRAGE_FAST
forever #25 TIME_B = ~TIME_B;
`else
forever #500 TIME_B = ~TIME_B;
`endif
end
// ------------------ Main initial ----------------
initial
begin
$timeformat(-6, 0, " us", 7);
Fails = 0;
ExpectedFails = 0;
TestNum = 0;
WatchDog_Rst_Occured = 0;
Testing_WatchDog = 0;
Testing_Reset = 0;
plus_max_cover_1 = 0;
InstrLoad_Mode = `SER_LOAD;
$readmemb("NOVeA_Contents.dat", MemArray);
`ifdef CFG_CODE
ConfigCode = `CFG_CODE;
`else
$readmemb("ConfigCode.dat", ConfigCode_Array);
ConfigCode = ConfigCode_Array[0];
`endif
`NOVEA_INST.uut.store_success_count <= #1 `STORSC;
WRCK_Enable = 1;
// ------------------ Parsing plusargs ----------------
if ($test$plusargs("help"))
begin
$display("$INFO --- plusarg +help detected ---\n");
Help;
$finish;
end
$display("$INFO ====#=#=#=#=# TESTING NOVEA MEMORY SYSTEM #=#=#=#=#====\n");
if ($test$plusargs("wrck_off"))
begin
$display("$INFO --- plusarg +wrck_off detected --- Turning WRCK Off\n");
WRCK_Enable = 0;
end
if ($test$plusargs("load_par"))
begin
$display("$INFO --- plusarg +load_par detected --- Parallel Loading of Instructions\n");
InstrLoad_Mode = `PAR_LOAD;
end
if ($test$plusargs("config_1"))
begin
$display("$INFO --- plusarg +config_1 detected --- Using line 1 of ConfigCode file\n");
ConfigCode = ConfigCode_Array[0];
end
if ($test$plusargs("config_2"))
begin
$display("$INFO --- plusarg +config_2 detected --- Using line 2 of ConfigCode file\n");
ConfigCode = ConfigCode_Array[1];
end
if ($test$plusargs("config_3"))
begin
$display("$INFO --- plusarg +config_3 detected --- Using line 3 of ConfigCode file\n");
ConfigCode = ConfigCode_Array[2];
end
if ($test$plusargs("config_4"))
begin
$display("$INFO --- plusarg +config_4 detected --- Using line 4 of ConfigCode file\n");
ConfigCode = ConfigCode_Array[3];
end
// ------------------
if ($test$plusargs("fullstore"))
begin
$display("$INFO --- plusarg +fullstore detected ---\n");
Run_FullStore;
end
else if ($test$plusargs("run_all")) // testset_1
begin
$display("$INFO --- plusarg +run_all detected ---\n");
Run_TestSet_1;
end
else if ($test$plusargs("max_cover_1"))
begin
$display("$INFO --- plusarg +max_cover_1 detected ---\n");
plus_max_cover_1 = 1;
Run_Test_MaxCover;
end
else if ($test$plusargs("max_cover"))
begin
$display("$INFO --- plusarg +max_cover detected ---\n");
Run_Test_MaxCover;
end
else if ($test$plusargs("test_watchdog"))
begin
$display("$INFO --- plusarg +test_watchdog detected ---\n");
WatchDog_Test;
end
else
Run_TestSet_1;
// ------------------ End of Parsing plusargs ----------------
if (Fails === 0)
begin
if (ExpectedFails === 0)
$display("\n$PASS =========== ALL TESTS PASSED SUCCESSFULLY ===========\n");
else
$display("\n$PASS ====== TESTS PASSED SUCCESSFULLY (%d Failed as Expected) =======\n", ExpectedFails);
end
else
$display("\n$FAIL ====== TESTS FAILED : %d Unexpected , %d as Expected ===========\n", Fails, ExpectedFails);
#1000;
$finish;
end // ------- Main initial
// ========================== Tasks ==============================
// ------------------ NMS_Reset ----------------
task NMS_Reset; // Sets Default Values on the NMS inputs and Resets NMS
begin
TestName = "NMS_Reset";
TestNum = TestNum + 1;
ME_p = 1'b0;
WE_p = 1'b0;
OE_p = 1'b0;
RA_p = 1'b0;
PAE_p = 1'b0;
UpdateWR = 0;
ShiftWR = 0;
SelectWIR = 0;
WRSTN = 1'b0;
#0 $display("$INFO ***** Resetting NOVeA Memory System ... *****");
if (WRCK_Enable)
begin
@(posedge WRCK);
@(negedge WRCK);
end
else #100;
WRSTN = #1 1'b1;
if (NMS_READY !== 0 || NMS_PASS !== 0)
begin
$display("\n$FAIL NMS_READY or NMS_PASS are not 0 during Reset: NMS_READY = %b , NMS_PASS = %b", NMS_READY, NMS_PASS);
Fails = Fails + 1;
end
$display("$INFO Waiting for NMS_READY ...\n");
wait(NMS_READY);
Display_Status;
TestName = 1'bx;
end
endtask // --- NMS_Reset
// ------------------ Load_WIR ----------------
task Load_WIR; // Loads WIR with given instruction
input [`WIR_MSB:0] Instr;
parameter WAIT_READY = 0;
integer i;
begin
if ((Instr ^ Instr) !== 0)
begin
$display("$FAIL Instruction to be Loaded contains X !!! Possibly incorrect Format of ConfigCode file.");
Fails = Fails + 1;
end
if (NMS_READY !== 1)
begin
if (WAIT_READY)
begin
$display("$INFO Waiting for NMS_READY before Loading WIR ...");
wait(NMS_READY);
end
else
$display("$INFO Warning: NMS_READY is not 1 during Load WIR : NMS_READY = %b !!!!", NMS_READY);
end
if (WRCK_Enable)
begin
$display("\n$INFO Loading WIR: %b .\n", Instr);
@(negedge WRCK);
SelectWIR = 1;
ShiftWR = 1;
for (i = `WIR_MSB; i >= 0; i = i - 1)
begin
WSI = Instr[i];
@(negedge WRCK);
end
ShiftWR = 0;
@(posedge WRCK);
UpdateWR = 1;
@(posedge WRCK);
UpdateWR = 0;
SelectWIR = 0;
end
else
begin
$display("\n$FAIL Cannot Load WIR because WRCK is OFF !!!");
Fails = Fails + 1;
$finish;
end
end
endtask // --- Load_WIR
// ------------------ Load_Instr_Par ----------------
task Load_Instr_Par; // Loads Given Instruction via Parallel pins
input [`INSTR_MSB:0] Instr;
parameter WAIT_READY = 1;
parameter PAE_WIDTH = 2;
reg [`PAR_I_MSB:0] Instr_Par;
begin
if (NMS_READY !== 1)
begin
if (WAIT_READY)
begin
$display("$INFO Waiting for NMS_READY ...");
wait(NMS_READY);
end
else
$display("$INFO Warning: NMS_READY is not 1 during Parallel Instruction Loading : NMS_READY = %b !!!", NMS_READY);
end
Instr_Par = Instr;
if (Instr === Instr_Par)
$display("\n$INFO Loading Parallel Instruction: %b\n", Instr_Par);
else
begin
$display("\n$FAIL This Instruction cannot be Loaded in Parallel way: %b\n", Instr);
Fails = Fails + 1;
end
@(negedge SYS_CK);
PA_p = Instr_Par;
PAE_p = 1;
repeat (PAE_WIDTH) @(negedge SYS_CK);
PA_p = 0;
PAE_p = 0;
end
endtask // --- Load_Instr_Par
// ------------------ Load_Config_Par ----------------
task Load_Config_Par; // Loads Given Configuration via Parallel bus
input [7:0] CRSTO_0;
input [6:0] CRSTO_1;
input [7:0] CRM_0;
input [7:0] CRM_1;
input [7:0] CRM_2;
input [5:0] CRM_3;
begin
$display("$INFO Loading Configuration: CRSTO_0 = %b, CRSTO_1 = %b, CRM_0 = %b, CRM_1 = %b, CRM_2 = %b, CRM_3 = %b.\n",
CRSTO_0, CRSTO_1, CRM_0, CRM_1, CRM_2, CRM_3);
if (((CRSTO_0 ^ CRSTO_1 ^ CRM_0 ^ CRM_1 ^ CRM_2 ^ CRM_3) ^
(CRSTO_0 ^ CRSTO_1 ^ CRM_0 ^ CRM_1 ^ CRM_2 ^ CRM_3)) !== 0)
begin
$display("$FAIL Configuration to be Loaded contains X !!! Possibly incorrect Format of ConfigCode file.");
Fails = Fails + 1;
end
@(negedge SYS_CK);
RA_p = 1;
ME_p = 1;
WE_p = 1;
ADR_p = 0;
D_p = CRSTO_0;
@(negedge SYS_CK);
ADR_p = 1;
D_p = CRSTO_1;
@(negedge SYS_CK);
ADR_p = 2;
D_p = CRM_0;
@(negedge SYS_CK);
ADR_p = 3;
D_p = CRM_1;
@(negedge SYS_CK);
ADR_p = 4;
D_p = CRM_2;
@(negedge SYS_CK);
ADR_p = 5;
D_p = CRM_3;
@(negedge SYS_CK);
RA_p = 0;
ME_p = 0;
WE_p = 0;
end
endtask // --- Load_Config_Par
// ------------------ Load_SRAM ----------------
task Load_SRAM; // Loads NOVeA SRAM from the file
integer i;
begin
$display("$INFO ---- Loadind NOVeA SRAM ----");
for (i = 0; i < `NW; i = i + 1)
`NOVEA_INST.uut.memb[i] = MemArray[i];
end
endtask // --- Load_SRAM
// ------------------ Load_EAROM ----------------
task Load_EAROM; // Loads NOVeA EAROM from the file
integer i;
begin
$display("$INFO ---- Loadind NOVeA EAROM ----");
for (i = 0; i < `NW; i = i + 1)
`NOVEA_INST.uut.earom[i] = MemArray[i];
end
endtask // --- Load_EAROM
// ------------------ Corrupt_SRAM ----------------
task Corrupt_SRAM; // Corrupts data in NOVeA SRAM
begin
$display("$INFO ---- Corrupting NOVeA SRAM Data for Test purposes ----");
`NOVEA_INST.uut.memb[0] = 1'bx;
end
endtask // --- Corrupt_SRAM
// ------------------ Corrupt_EAROM ----------------
task Corrupt_EAROM; // Corrupts data in NOVeA EAROM
begin
$display("$INFO ---- Corrupting NOVeA EAROM Data for Test purposes ----");
`NOVEA_INST.uut.earom[0] = 1'bx;
end
endtask // --- Corrupt_EAROM
// ------------------ Comp_SRAM_EAROM ----------------
task Comp_SRAM_EAROM; // Compares NOVeA SRAM with NOVeA EAROM
output IncorrCells; // Quantity of Mismatched Words
integer i;
integer IncorrCells;
begin
IncorrCells = 0;
for (i = 0; i < `NW; i = i + 1) // Comparing SRAM Contents with EAROM
begin
if ((`NOVEA_INST.uut.memb[i] ^ `NOVEA_INST.uut.earom[i]) !== 0) IncorrCells = IncorrCells + 1;
end
end
endtask // --- Comp_SRAM_EAROM
// ------------------ Display_Status ----------------
task Display_Status; // Displays Status of NMS
begin
$display("$INFO NMS Status: NMS_READY = %b, NMS_PASS = %b, KEEP_ON = %b.",
NMS_READY, NMS_PASS, KEEP_ON);
end
endtask // --- Display_Status
// ------------------ TDelay ----------------
task TDelay; // Provides Delays between Tests
begin
#5; //#500; // This delay can be removed
end
endtask // --- TDelay
// ------------------ Parall_WriteRead_Test ----------------
task Parall_WriteRead_Test; // Tests Write and Read of NOVeA SRAM through Parallel pins
integer i;
begin
TestName = "Parall_WriteRead";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing NOVeA SRAM Parallel Write/Read ***********");
@(negedge SYS_CK);
RA_p = 1'b0;
OE_p = 1'b1;
ME_p = 1'b1;
IncorrCells = 0;
for (i = `NW-1; i >= 0; i = i - 1)
begin
ADR_p = i;
D_p = ~MemArray[i];
WE_p = 1'b1; // Writing
@(negedge SYS_CK);
end
ME_p = 1'b0;
@(negedge SYS_CK);
ME_p = 1'b1;
for (i = `NW-1; i >= 0; i = i - 1)
begin
ADR_p = i;
D_p = MemArray[i];
WE_p = 1'b0; // Reading
@(negedge SYS_CK);
D_p = MemArray[i];
WE_p = 1'b1; // Writing
@(posedge SYS_CK);
if ((Q ^ ~MemArray[i]) !== 0)
begin
IncorrCells = IncorrCells + 1;
$display("$FAIL NOVeA SRAM Parallel Write/Read Failed(1) !!! ADR_p = %d, Q = %b, Expected: Q = %b", ADR_p, Q, MemArray[i]);
end
@(negedge SYS_CK);
D_p = ~MemArray[i];
WE_p = 1'b0; // Reading
@(negedge SYS_CK);
@(posedge SYS_CK);
if ((Q ^ MemArray[i]) !== 0)
begin
IncorrCells = IncorrCells + 1;
$display("$FAIL NOVeA SRAM Parallel Write/Read Failed(2) !!! ADR_p = %d, Q = %b, Expected: Q = %b", ADR_p, Q, MemArray[i]);
end
@(negedge SYS_CK);
end
if (IncorrCells === 0)
$display("\n$PASS NOVeA SRAM Parallel Write/Read Passed !!! \n");
else Fails = Fails + 1;
ME_p = 1'b0;
WE_p = 1'b0;
OE_p = 1'b0;
TestName = 1'bx;
end
endtask // --- Parall_WriteRead_Test
// ------------------ ConfigReg_Test ----------------
task ConfigReg_Test; // Tests Access to NMS Configuration Registers
reg [7:0] ConfReg_Expect [7:0];
integer i;
begin // Note: Config Regs should be reset before Running this Test
TestName = "ConfigReg";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Access to NMS Configuration Registers ********");
ConfReg_Expect[3'b000] = 8'b00000001; // Initial (Default) Values
ConfReg_Expect[3'b001] = 8'b00010010;
ConfReg_Expect[3'b010] = 8'b10010000;
ConfReg_Expect[3'b011] = 8'b10010110;
ConfReg_Expect[3'b100] = 8'b01011001;
ConfReg_Expect[3'b101] = 8'b00010101;
ConfReg_Expect[3'b110] = 8'b01001111;
ConfReg_Expect[3'b111] = 8'b00000001;
@(negedge SYS_CK);
OE_p = 1'b1;
RA_p = 1'b1;
IncorrCells = 0;
// - - - - - Reading Initial values then Writing New values - - -
for (i = 0; i < 8; i = i + 1)
begin
ADR_p = i;
D_p = 'bx;
ME_p = 1'b1;
WE_p = 1'b0; // Reading
@(negedge SYS_CK);
@(posedge SYS_CK);
if ((Q[7:0] ^ ConfReg_Expect[ADR_p]) !== 0)
begin
IncorrCells = IncorrCells + 1;
$display("\n$FAIL Incorrect Initial Value of Configuration Register: ADR_p = %b; Q = %b, Expected: %b \n",
ADR_p, Q, ConfReg_Expect[ADR_p]);
end
case (ADR_p)
3'b000: ConfReg_Expect[ADR_p] = 8'b01000101; // New Values
3'b001: ConfReg_Expect[ADR_p] = 8'b00101011;
3'b010: ConfReg_Expect[ADR_p] = 8'b00111001;
3'b011: ConfReg_Expect[ADR_p] = 8'b00100001;
3'b100: ConfReg_Expect[ADR_p] = 8'b10100110;
3'b101: ConfReg_Expect[ADR_p] = 8'b00001000;
endcase
@(negedge SYS_CK);
D_p = ConfReg_Expect[ADR_p];
ME_p = 1'b1;
WE_p = 1'b1; // Writing
@(negedge SYS_CK);
end
// - - - - - Reading previously Written values - - - -
for (i = 0; i < 8; i = i + 1)
begin
ADR_p = i;
D_p = 'bx;
ME_p = 1'b1;
WE_p = 1'b0; // Reading
@(negedge SYS_CK);
@(posedge SYS_CK);
if ((Q[7:0] ^ ConfReg_Expect[ADR_p]) !== 0)
begin
IncorrCells = IncorrCells + 1;
$display("\n$FAIL Incorrect Value of Configuration Register: ADR_p = %b; Q = %b, Expected:Q = %b \n",
ADR_p, Q, ConfReg_Expect[ADR_p]);
end
@(negedge SYS_CK);
end
// - - - - - - - - - - - -
ME_p = 1'b0;
WE_p = 1'b0;
OE_p = 1'b0;
RA_p = 1'b0;
if (IncorrCells === 0)
$display("\n$PASS NMS Configuration Registers Test Passed !!! \n");
else Fails = Fails + 1;
TestName = 1'bx;
end
endtask // --- ConfigReg_Test
// ------------------ Bypass_Test ----------------
task Bypass_Test; // Tests Bypass Mode
input Parall;
reg [8:0] TestData;
integer CorrectBitCnt;
integer i;
begin
TestName = "Bypass";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Bypass Mode ***********");
if (Parall)
Load_Instr_Par(`I_BYPASS);
else
Load_WIR({`I_BYPASS, ConfigCode});
TestData = 9'b100011000;
CorrectBitCnt = 0;
@(negedge WRCK);
ShiftWR = 1'b1;
SelectWIR = 1'b0;
for (i = 0; i <= 8; i = i + 1)
begin
WSI = TestData[8-i];
if (i == 4)
begin
ShiftWR = 0;
repeat(3) @(negedge WRCK);
ShiftWR = 1;
end
@(posedge WRCK);
if ((i > 0) && ((WSO ^ TestData[8-i+1]) === 0)) CorrectBitCnt = CorrectBitCnt + 1;
@(negedge WRCK);
end
ShiftWR = 1'b0;
Display_Status;
if (CorrectBitCnt === 8 && NMS_PASS && NMS_READY)
$display("\n$PASS Bypass Mode Test Passed !!! \n");
else
begin
$display("\n$FAIL Bypass Mode Test Failed !!! \n");
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- Bypass_Test
// ------------------ Serial_Test ----------------
task Serial_Test; // Tests Serial Access to NOVeA SRAM
input Parall;
integer i, j;
begin
TestName = "Serial";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Serial Access ***********");
if (Parall)
begin
@(negedge WRCK);
Load_Instr_Par(`I_SERIAL);
end
else
Load_WIR({`I_SERIAL, ConfigCode});
IncorrCells = 0;
@(negedge WRCK);
SelectWIR = 0;
ShiftWR = 1;
for (i = `NW-1; i >= 0; i = i - 1)
for (j = `NB-1; j >= 0; j = j - 1)
begin
TempWord = MemArray[i];
WSI = ~TempWord[j];
@(posedge WRCK);
if (WSO !== TempWord[j]) IncorrCells = IncorrCells + 1;
@(negedge WRCK);
end
ShiftWR = 0;
@(negedge WRCK);
ShiftWR = 1;
for (i = `NW-1; i >= 0; i = i - 1)
for (j = `NB-1; j >= 0; j = j - 1)
begin
TempWord = MemArray[i];
WSI = TempWord[j];
@(posedge WRCK);
if (WSO !== ~TempWord[j]) IncorrCells = IncorrCells + 1;
@(negedge WRCK);
end
ShiftWR = 0;
Display_Status;
if (IncorrCells === 0 && NMS_PASS && NMS_READY)
$display("\n$PASS Serial Access to NOVeA SRAM Passed !!! \n");
else
begin
$display("\n$FAIL Serial Access to NOVeA SRAM Failed !!! \n");
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- Serial_Test
// ------------------ Serial_Loop_Test ----------------
task Serial_Loop_Test; // Tests Serial Loop Mode of NMS
integer i, j;
begin
TestName = "Serial_Loop";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Serial Loop Mode ***********");
Load_WIR({`I_SER_LOOP, ConfigCode});
IncorrCells = 0;
@(negedge WRCK);
SelectWIR = 0;
ShiftWR = 1;
for (i = `NW-1; i >= 0; i = i - 1)
for (j = `NB-1; j >= 0; j = j - 1)
begin
TempWord = MemArray[i];
WSI = 'bx;
@(posedge WRCK);
if ((WSO ^ TempWord[j]) !== 0)
begin
IncorrCells = IncorrCells + 1;
$display("$FAIL Incorrect Data on Serial Output: WSO = %b, Expected = %b.", WSO, TempWord[j]);
end
@(negedge WRCK);
if (i == 5)
begin
ShiftWR = 0;
repeat(3) @(negedge WRCK);
ShiftWR = 1;
end
end
ShiftWR = 0;
Display_Status;
if (IncorrCells === 0 && NMS_PASS && NMS_READY)
$display("\n$PASS Test of Serial Loop Mode Passed !!! \n");
else
begin
$display("\n$FAIL Test of Serial Loop Mode Failed !!! \n");
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- Serial_Loop_Test
// ------------------ AutoShift_Test ----------------
task AutoShift_Test; // Tests Serial Loop Mode of NMS
integer i;
begin
TestName = "AutoShift";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Cyclic AutoShift ***********");
Load_WIR({`I_SER_LOOP, ConfigCode});
@(negedge WRCK);
SelectWIR = 0;
ShiftWR = 1;
repeat(7 * `NB) @(negedge WRCK); // Shifting NOVeA SRAM Contents
ShiftWR = 0;
Load_WIR({`I_AUTO_SHIFT, ConfigCode});
@(posedge NMS_READY);
@(posedge SYS_CK);
Display_Status;
IncorrCells = 0;
for (i = 0; i < `NW; i = i + 1) // Comparing SRAM Contents with expected data
begin
if ((`NOVEA_INST.uut.memb[i] ^ MemArray[i]) !== 0) IncorrCells = IncorrCells + 1;
end
if (IncorrCells === 0 && NMS_PASS && NMS_READY)
$display("\n$PASS Test of Cyclic AutoShift Passed !!! \n");
else
begin
if (Testing_Reset)
begin
$display("\n$INFO Test of Cyclic AutoShift Failed (as Expected). \n");
ExpectedFails = ExpectedFails + 1;
end
else
begin
$display("\n$FAIL Test of Cyclic AutoShift Failed !!! \n");
Fails = Fails + 1;
end
end
TestName = 1'bx;
end
endtask // --- AutoShift_Test
// ------------------ FullStore_Test ----------------
task FullStore_Test; // Tests Full Store Operation
input Parall;
begin
TestName = "FullStore";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Full Store Operation ***************");
$display("\n$INFO NOVeA store_success_count == %d", `NOVEA_INST.uut.store_success_count);
StorePulse_Count = 0;
if (Parall)
begin
Load_Instr_Par(`I_FULL_STORE);
end
else
Load_WIR({`I_FULL_STORE, ConfigCode});
@(posedge NMS_READY);
@(posedge SYS_CK);
Display_Status;
Comp_SRAM_EAROM(IncorrCells);
if (NMS_PASS && NMS_READY && (IncorrCells === 0) &&
(`NOVEA_INST.uut.store_ctr >= `NOVEA_INST.uut.store_success_count))
$display("\n$PASS Full Store Operation Passed !!! \n");
else if (Testing_WatchDog || (`NOVEA_INST.uut.store_ctr < `NOVEA_INST.uut.store_success_count))
begin
$display("\n$INFO Full Store Operation Failed (as expected). \n");
ExpectedFails = ExpectedFails + 1;
end
else
begin
$display("\n$FAIL Full Store Operation Failed !!! \n");
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- FullStore_Test
// ------------------ SoftStore_Test ----------------
task SoftStore_Test; // Tests Soft Store Operation
begin
TestName = "SoftStore";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Soft Store Operation ***************");
Load_WIR({`I_SOFT_STORE, ConfigCode});
@(posedge NMS_READY);
@(posedge SYS_CK);
Display_Status;
if (NMS_PASS && NMS_READY)
$display("\n$PASS Soft Store Operation Passed !!! \n");
else
begin
$display("\n$FAIL Soft Store Operation Failed !!! \n");
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- SoftStore_Test
// ------------------ NRecall_Test ----------------
task NRecall_Test; // Tests Normal Recall Operation
input Parall;
begin
TestName = "NRecall";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Normal Recall Operation ***************");
if (Parall)
Load_Instr_Par(`I_NRECALL);
else
Load_WIR({`I_NRECALL, ConfigCode});
@(posedge NMS_READY);
@(posedge SYS_CK);
Display_Status;
Comp_SRAM_EAROM(IncorrCells);
if (NMS_PASS && NMS_READY && (IncorrCells === 0))
$display("\n$PASS Normal Recall Operation Passed !!! \n");
else
begin
$display("\n$FAIL Normal Recall Operation Failed !!! \n");
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- NRecall_Test
// ------------------ MRecall_Test ----------------
task MRecall_Test; // Tests Margin Recall Operation through P1500
begin
TestName = "MRecall";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Margin Recall Operation ***************");
Load_WIR({`I_MRECALL, ConfigCode});
@(posedge NMS_READY);
@(posedge SYS_CK);
Display_Status;
Comp_SRAM_EAROM(IncorrCells);
if (NMS_PASS && NMS_READY && (IncorrCells === 0))
$display("\n$PASS Margin Recall Operation Passed !!! \n");
else
begin
$display("\n$FAIL Margin Recall Operation Failed !!! \n");
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- MRecall_Test
// ------------------ NCompare_Test ----------------
task NCompare_Test; // Tests Normal Compare Operation
input Parall;
begin
TestName = "NCompare";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Normal Compare Operation ***************");
if (Parall)
Load_Instr_Par(`I_NCOMPARE);
else
Load_WIR({`I_NCOMPARE, ConfigCode});
@(posedge NMS_READY);
@(posedge SYS_CK);
Display_Status;
Comp_SRAM_EAROM(IncorrCells);
if (NMS_PASS && NMS_READY && (IncorrCells === 0))
$display("\n$PASS Normal Compare Operation Passed !!! \n");
else
begin
$display("\n$FAIL Normal Compare Operation Failed !!! \n");
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- NCompare_Test
// ------------------ MCompare_Test ----------------
task MCompare_Test; // Tests Margin Compare Operation through P1500
begin
TestName = "MCompare";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Margin Compare Operation ***************");
Load_WIR({`I_MCOMPARE, ConfigCode});
@(posedge NMS_READY);
@(posedge SYS_CK);
Display_Status;
Comp_SRAM_EAROM(IncorrCells);
if (NMS_PASS && NMS_READY && (IncorrCells === 0))
$display("\n$PASS Margin Compare Operation Passed !!! \n");
else
begin
$display("\n$FAIL Margin Compare Operation Failed !!! \n");
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- MCompare_Test
// ------------------ Keep_Test ----------------
task Keep_Test; // Tests Keep Mode
input Parall;
input LongDelay;
integer i;
begin
TestName = "Keep_On";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Keep Mode ***************");
if (Parall)
Load_Instr_Par(`I_KEEP);
else
Load_WIR({`I_KEEP, ConfigCode});
@(posedge NMS_READY);
@(posedge SYS_CK);
if (KEEP_ON !== 1)
begin
$display("\n$FAIL KEEP_ON is not 1 in Keep Mode : KEEP_ON = %b .", KEEP_ON);
Fails = Fails + 1;
end
else
begin
$display("\n$INFO Keep Mode is ON ...");
//--------------------------------------------------
$display("\n$TEST Performing Read from NOVeA SRAM in Keep Mode ...");
@(negedge SYS_CK);
RA_p = 1'b0;
ME_p = 1'b1;
WE_p = 1'b0;
OE_p = 1'b1;
IncorrCells = 0;
for (i = `NW-1; i >= 0; i = i - 1)
begin
ADR_p = i;
D_p = ~MemArray[i];
@(negedge SYS_CK);
@(posedge SYS_CK); // Reading
if ((Q ^ MemArray[i]) !== 0)
begin
IncorrCells = IncorrCells + 1;
$display("\n$FAIL NOVeA SRAM Parallel Read Failed !!! ADR_p = %d, Q = %b, Expected: %b", ADR_p, Q, MemArray[i]);
end
@(negedge SYS_CK);
end
if (IncorrCells === 0)
$display("\n$PASS NOVeA SRAM Parallel Read Passed !!! \n");
else Fails = Fails + 1;
ME_p = 1'b0;
WE_p = 1'b0;
OE_p = 1'b0;
//--------------------------------------------------
if (LongDelay)
begin
TestName = "Keep_Stay";
$display("$INFO Staying in Keep Mode .......");
`ifdef VIRAGE_FAST
#15000000;
`else
#300000000;
`endif
end
TestName = "Keep_Off";
if (Parall)
Load_Instr_Par(`I_IDLE);
else
Load_WIR({`I_IDLE, ConfigCode});
@(posedge NMS_READY);
@(posedge SYS_CK);
if (KEEP_ON !== 0)
begin
$display("\n$FAIL KEEP_ON is not 0 after exiting Keep Mode : KEEP_ON = %b .\n", KEEP_ON);
Fails = Fails + 1;
end
else
begin
$display("\n$INFO Keep Mode is OFF ... ");
if (NMS_PASS && NMS_READY)
$display("\n$PASS Keep Mode Test Passed !!! \n");
else
begin
$display("\n$FAIL Keep Mode Test Failed !!! \n");
Fails = Fails + 1;
end
end
end
TestName = 1'bx;
end
endtask // --- Keep_Test
// ------------------ Recall_AM_Test ----------------
task Recall_AM_Test; // Tests Recall Auto Margin Operation
input Parall;
input Corrupt;
begin
TestName = "Recall_AM";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Recall Auto Margin Operation *************");
$display("\n$INFO NOVeA store_success_count == %d", `NOVEA_INST.uut.store_success_count);
if (Parall)
Load_Instr_Par(`I_RECALLAM);
else
Load_WIR({`I_RECALLAM, ConfigCode});
@(negedge `NOVEA_INST.RECALL);
if (Corrupt) Corrupt_EAROM;
@(posedge NMS_READY);
@(posedge SYS_CK);
Display_Status;
Comp_SRAM_EAROM(IncorrCells);
if (NMS_PASS && NMS_READY && (IncorrCells === 0))
$display("\n$PASS Recall Auto Margin Operation Passed !!! \n");
else
begin
$display("\n$FAIL Recall Auto Margin Operation Failed !!! \n");
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- Recall_AM_Test
// -----------------------------------------------------------------------------------------
// ------------------ Reset_Test ----------------
task Reset_Test; // Tests Reset Instruction
integer StepCntr;
begin
TestName = "Reset";
TestNum = TestNum + 1;
$display("\n$TEST *********** Testing Reset Instruction ***************");
Load_WIR({`I_RESET, ConfigCode});
StepCntr = 0;
fork
begin : RstTest_Steps
wait(U_NMS.U_NMSC.RST_i);
StepCntr = StepCntr + 1;
@(negedge U_NMS.U_NMSC.RST_i);
StepCntr = StepCntr + 1;
@(posedge NMS_READY);
StepCntr = StepCntr + 1;
disable RstTest_WtchDog;
end
begin : RstTest_WtchDog
repeat (8) @(posedge SYS_CK);
if (StepCntr < 1)
disable RstTest_Steps;
else
begin
#100000;
if (StepCntr < 2) disable RstTest_Steps;
end
end
join
if (StepCntr == 3)
$display("\n$PASS Reset Instruction Test Passed !!! \n");
else
begin
$display("\n$FAIL Reset Instruction Test Failed on Step %d !!! \n", StepCntr);
Fails = Fails + 1;
end
TestName = 1'bx;
end
endtask // --- Reset_Test
// ------------------ WatchDog_Test ----------------
task WatchDog_Test; // Tests WatchDog
begin
$display("\n$TEST *********** Testing WatchDog ***************");
NMS_Reset;
Testing_WatchDog = 1;
$display("$INFO Forcing UNLOCK of ChargePump = 0 ...");
force U_NMS.U_ChPump.UNLOCK = 0;
FullStore_Test(`PAR_LOAD);
$display("$INFO Releasing UNLOCK of ChargePump ...");
release U_NMS.U_ChPump.UNLOCK;
Testing_WatchDog = 0;
end
endtask // --- WatchDog_Test
// ------------------ Help ----------------
task Help; // Displays Help information
begin
$display("\n ****** NOVeA Memory System TestBench Help ******\n");
$display("\n - - - plusarg +max_cover runs tests for Maximal Code Coverage - - - -\n");
$display("\n ....... For more Help use new versions of TestBench ..............\n");
// +define+STORSC=n
//
//
end
endtask // --- Help
// ------------------ Run_FullStore ----------------
task Run_FullStore; // Runs FullStore test
begin
NMS_Reset;
Load_SRAM;
if (InstrLoad_Mode == `PAR_LOAD)
Load_Config_Par(ConfigCode[7:0], ConfigCode[14:8], ConfigCode[22:15],
ConfigCode[30:23], ConfigCode[38:31], ConfigCode[44:39]);
FullStore_Test(InstrLoad_Mode);
end
endtask // --- Run_FullStore
// ------------------ Run_TestSet_1 ----------------
task Run_TestSet_1; // Runs a set of Tests
begin
WRCK_Enable = 0; // Turn Off WRCK Generator
NMS_Reset; TDelay;
Parall_WriteRead_Test; TDelay;
ConfigReg_Test; TDelay;
FullStore_Test(`PAR_LOAD); TDelay;
WRCK_Enable = 1; // Start WRCK Generator
NMS_Reset; TDelay;
NRecall_Test(`PAR_LOAD); TDelay;
ConfigCode = 45'b000000_000000_000000_000000_000000_000_00_00_1010_00_01;
SoftStore_Test; TDelay;
NCompare_Test(`PAR_LOAD); TDelay;
Recall_AM_Test(`PAR_LOAD, 0); TDelay;
ConfigCode = 45'b100000_110110_100101_001001_100001_001_00_10_0000_00_00;
MCompare_Test; TDelay;
MRecall_Test; TDelay;
Bypass_Test(`SER_LOAD); TDelay;
Parall_WriteRead_Test; TDelay;
Serial_Test(`SER_LOAD); TDelay;
Serial_Loop_Test; TDelay;
AutoShift_Test; TDelay;
Keep_Test(`SER_LOAD, 0); TDelay;
Serial_Test(`PAR_LOAD); TDelay;
ConfigCode = 45'b111111111111111111111111111111111111111111111;
Reset_Test; TDelay;
Keep_Test(`PAR_LOAD, 0); TDelay;
// FullStore_Test(`SER_LOAD); TDelay;
end
endtask // --- Run_TestSet_1
// ------------------ Run_Test_MaxCover ----------------
task Run_Test_MaxCover; // Runs a set of Tests to provide Maximal Code Coverage
begin
`ifdef PRE_SYNTH
U_NMS.U_NMSC.U_NVC.CurrentState = 31; // Testing default case of FSM NextState
`endif
NMS_Reset;
Parall_WriteRead_Test;
ConfigReg_Test;
Load_Config_Par(ConfigCode[7:0], ConfigCode[14:8], ConfigCode[22:15],
ConfigCode[30:23], ConfigCode[38:31], ConfigCode[44:39]);
FullStore_Test(`PAR_LOAD);
NRecall_Test(`SER_LOAD);
ConfigCode = 45'b010101_010110_011001_011010_010000_000_00_11_0000_00_00;
MCompare_Test;
Corrupt_EAROM;
Serial_Test(`PAR_LOAD);
`NOVEA_INST.uut.store_success_count = 10;
ConfigCode = 45'b101010_011101_111110_011001_000010_001_01_10_0010_00_01;
FullStore_Test(`SER_LOAD);
ConfigCode = 45'b000000_110000_001000_110000_011101_111_11_11_0011_01_10;
Load_Config_Par(ConfigCode[7:0], ConfigCode[14:8], ConfigCode[22:15],
ConfigCode[30:23], ConfigCode[38:31], ConfigCode[44:39]);
FullStore_Test(`PAR_LOAD);
NCompare_Test(`PAR_LOAD);
ConfigCode = 45'b110010_100001_010010_100101_001001_011_11_00_1111_11_11;
SoftStore_Test;
AutoShift_Test;
Corrupt_SRAM;
ConfigCode = 45'b101101_011010_111001_100010_000110_010_10_01_0110_10_10;
MRecall_Test;
Bypass_Test(`PAR_LOAD);
Parall_WriteRead_Test;
`NOVEA_INST.uut.store_success_count = 3;
ConfigCode = 45'b110001_100110_010001_101010_001101_100_00_00_0101_10_01;
Recall_AM_Test(`SER_LOAD, 1);
Serial_Loop_Test;
Keep_Test(`PAR_LOAD, 1);
Parall_WriteRead_Test;
Serial_Test(`SER_LOAD);
$display("\n$TEST *** Testing Reset Instruction in the Middle of AutoShift ***\n");
fork
begin
AutoShift_Test;
end
begin
@(negedge UpdateWR);
@(negedge UpdateWR);
Testing_Reset = 1;
#500 Reset_Test;
end
join
Testing_Reset = 0;
WatchDog_Test;
if (~plus_max_cover_1)
begin
Parall_WriteRead_Test;
`NOVEA_INST.uut.store_success_count = 260;
ConfigCode = 45'b111110_101001_011110_101101_010000_101_01_01_1010_11_01;
FullStore_Test(`SER_LOAD);
end
end
endtask // --- Run_Test_MaxCover
// -----------------------------------------------------------------------------
// ------------------------ Reset Messages ----------------------
always @(posedge U_NMS.U_ChPump.RST)
begin
#0;
$display("$INFO Resetting Charge Pump ... ");
end
// --------------- Store Messages and Pulse Width Calculations ----------------
always @(posedge `NOVEA_INST.STORE)
begin
Time_STORE_rise = $time;
StorePulse_Count = StorePulse_Count + 1;
$display("\n$INFO Storing ... VPPRANGE = %d , VPPSEL = %d",
U_NMS.U_ChPump.uut.VPPRANGE_latched, U_NMS.U_ChPump.uut.VPPSEL_latched);
end
always @(negedge `NOVEA_INST.STORE)
begin
Width_STORE = $time - Time_STORE_rise;
Time_STORE_rise = 1'bx;
if ($time > 10)
begin
$display("$INFO _|--|_ Pulse Width : STORE: %t, PE: %t, VPP: %t\n",
Width_STORE, Width_PE, Width_VPP);
end
end
always @(U_NMS.U_ChPump.PE)
begin
if (U_NMS.U_ChPump.PE === 1'b1)
Time_PE_rise = $time;
else if (U_NMS.U_ChPump.PE === 1'b0)
begin
Width_PE = $time - Time_PE_rise;
Time_PE_rise = 1'bx;
end
else
Time_PE_rise = 1'bx;
end
always @(`NOVEA_INST.VPP)
begin
if (`NOVEA_INST.VPP === 1'b1)
Time_VPP_rise = $time;
else if (`NOVEA_INST.VPP === 1'b0)
begin
Width_VPP = $time - Time_VPP_rise;
Time_VPP_rise = 1'bx;
end
else
Time_VPP_rise = 1'bx;
end
// ---------------------- Compare and Recall Messages ------------------
always @(posedge `NOVEA_INST.COMP)
begin
$display("$INFO Comparing... BIAS1= %b, BIAS0= %b, MRCL1= %b, MRCL0= %b, TECC1= %b, TECC0= %b",
`NOVEA_INST.BIAS1, `NOVEA_INST.BIAS0, `NOVEA_INST.MRCL1, `NOVEA_INST.MRCL0, `NOVEA_INST.TECC1, `NOVEA_INST.TECC0);
end
always @(posedge `NOVEA_INST.RECALL)
begin
$display("$INFO Recalling... BIAS1= %b, BIAS0= %b, MRCL1= %b, MRCL0= %b, TECC1= %b, TECC0= %b",
`NOVEA_INST.BIAS1, `NOVEA_INST.BIAS0, `NOVEA_INST.MRCL1, `NOVEA_INST.MRCL0, `NOVEA_INST.TECC1, `NOVEA_INST.TECC0);
end
always @(posedge `NOVEA_INST.RCREADY)
begin
if (`NOVEA_INST.COMP)
$display("$INFO Compare Completed, MATCH = %b", `NOVEA_INST.MATCH);
else $display("$INFO Recall Completed, RCREADY = %b\n", `NOVEA_INST.RCREADY);
end
// ---------------------- WRCK Generator Messages ------------------
always @(WRCK_Enable)
begin
if (WRCK_Enable)
$display("$INFO ============ P1500 Clock (WRCK) is ON ... ===========\n");
else
$display("$INFO ============ P1500 Clock (WRCK) is OFF ... ===========\n");
end
// --------------------------------------------
`ifdef PRE_SYNTH
// -------------------- Timer Overflow Check ------------------
always @(U_NMS.U_NMSC.U_NVC.Timer_r)
begin
if (&U_NMS.U_NMSC.U_NVC.Timer_r)
begin
$display("$FAIL ===== Timer Overflow =====");
Fails = Fails + 1;
end
end
// -------------------- WatchDog Reset Message ------------------
always @(posedge U_NMS.U_NMSC.U_NVC.rst_WatchDog)
begin
WatchDog_Rst_Occured = 1;
if (Testing_WatchDog)
$display("$INFO ***** WatchDog is Resetting the NMS Conrtoller... *****");
else
begin
$display("$FAIL ===== WatchDog is Resetting the NMS Conrtoller... =====");
Fails = Fails + 1;
end
end
// --------------------------------------------
`endif // --- PRE_SYNTH
// --------------------------------------------
endmodule // --- NMS_tb