ep.v 3.91 KB
/**************************************************************************
 *                                                                        *
 *               Copyright (C) 1994, Silicon Graphics, Inc.               *
 *                                                                        *
 *  These coded instructions, statements, and computer programs  contain  *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and  *
 *  are protected by Federal copyright  law.  They  may not be disclosed  *
 *  to  third  parties  or copied or duplicated in any form, in whole or  *
 *  in part, without the prior written consent of Silicon Graphics, Inc.  *
 *                                                                        *
 *************************************************************************/

// $Id: ep.v,v 1.1 2002/03/28 00:26:13 berndt Exp $

////////////////////////////////////////////////////////////////////////
//
// Project Reality
//
// module:      ep
// description: Top level for edge walker pipe.
//
// designer:    Phil Gossett
// date:        6/7/95
//
////////////////////////////////////////////////////////////////////////

module ep (gclk, dither_type, cycle_type, tlut_en, tc_load,
	ew_st_span, ew_d,  cv_x_offset, cv_y_offset, cv_cvg, cv_mask,
	x_dither, y_dither,
	st_span_st_w, st_span_st_s, st_span_st_t,
	st_span_st_r, st_span_st_g, st_span_st_b, st_span_st_a,
	st_span_st_z,
	st_span_tc, st_span_tf, st_span_cc, st_span_bl, st_span_ms,
	d_w, d_s, d_t, d_r, d_g, d_b, d_a, d_z,
	x_offset_r, x_offset_g, x_offset_b, x_offset_a, x_offset_z,
	y_offset_r, y_offset_g, y_offset_b, y_offset_a, y_offset_z,
	cvg_cc, mask_bl, rgb_dither, alpha_dither);

input gclk;
input dither_type;
input [1:0] cycle_type;
input tlut_en;
input tc_load;
input ew_st_span;
input [21:0] ew_d;
input [1:0] cv_x_offset;
input [1:0] cv_y_offset;
input [3:0] cv_cvg;
input cv_mask;
input [1:0] x_dither;
input [1:0] y_dither;

output st_span_st_w;
output st_span_st_s;
output st_span_st_t;
output st_span_st_r;
output st_span_st_g;
output st_span_st_b;
output st_span_st_a;
output st_span_st_z;
output st_span_tc;
output st_span_tf;
output st_span_cc;
output st_span_bl;
output st_span_ms;
output [21:0] d_w;
output [21:0] d_s;
output [21:0] d_t;
output [21:0] d_r;
output [21:0] d_g;
output [21:0] d_b;
output [21:0] d_a;
output [21:0] d_z;
output [1:0] x_offset_r;
output [1:0] x_offset_g;
output [1:0] x_offset_b;
output [1:0] x_offset_a;
output [1:0] x_offset_z;
output [1:0] y_offset_r;
output [1:0] y_offset_g;
output [1:0] y_offset_b;
output [1:0] y_offset_a;
output [1:0] y_offset_z;
output [3:0] cvg_cc;
output mask_bl;
output [2:0] rgb_dither;
output [2:0] alpha_dither;

wire st_span_10d;
wire [21:0] d_3d;

ep_tc eptc (	.gclk(gclk), .tlut_en(tlut_en), .tc_load(tc_load),
		.ew_st_span(ew_st_span), .ew_d(ew_d),
		.st_span_st_w(st_span_st_w),
		.st_span_st_s(st_span_st_s), .st_span_st_t(st_span_st_t),
		.st_span_tc(st_span_tc), .st_span_10d(st_span_10d),
		.d_w(d_w), .d_s(d_s), .d_t(d_t), .d_3d(d_3d));

ep_cc epcc (	.gclk(gclk),
		.dither_type(dither_type), .cycle_type(cycle_type),
		.x_dither(x_dither), .y_dither(y_dither),
		.st_span_10d(st_span_10d), .d_3d(d_3d),
		.cv_x_offset(cv_x_offset), .cv_y_offset(cv_y_offset),
		.cv_cvg(cv_cvg), .cv_mask(cv_mask),
		.st_span_st_r(st_span_st_r), .st_span_st_g(st_span_st_g),
		.st_span_st_b(st_span_st_b), .st_span_st_a(st_span_st_a),
		.st_span_st_z(st_span_st_z),
		.st_span_tf(st_span_tf), .st_span_cc(st_span_cc),
		.st_span_bl(st_span_bl), .st_span_ms(st_span_ms),
		.d_r(d_r), .d_g(d_g), .d_b(d_b), .d_a(d_a), .d_z(d_z),
		.x_offset_r(x_offset_r), .x_offset_g(x_offset_g),
		.x_offset_b(x_offset_b), .x_offset_a(x_offset_a),
		.x_offset_z(x_offset_z),
		.y_offset_r(y_offset_r), .y_offset_g(y_offset_g),
		.y_offset_b(y_offset_b), .y_offset_a(y_offset_a),
		.y_offset_z(y_offset_z),
		.cvg_cc(cvg_cc), .mask_bl(mask_bl),
		.rgb_dither(rgb_dither), .alpha_dither(alpha_dither));

endmodule // ep