tst_dtest.tab 4.58 KB
clock                @C 1(50) 0(50)
tst_ad16_write_l     @O @S 95    
pad_reset_l          @I @E 2     
test                 @I @E 2     
st_0	          @O @S 14    
st_1	          @O @S 14    
st_mux	          @O @S 14    
ad16_data_in[14:0]   @I @E 2     
ad16_enable_l        @I @E 2     
ad16_read_l          @I @E 2     
ad16_write_l         @I @E 2     
bist_flag            @I @E 2     
tst_ad16_enable_l_0  @O @S 14    
tst_ad16_enable_l_1  @O @S 14    
tst_ad16_read_l      @O @S 14    
tst_by_pass          @O @S 14    
tst_bist_mode        @O @S 14    
tst_iost_mode        @O @S 14    
tst_rac_reset        @O @S 14    
tst_ext_be           @O @S 14    
tst_c_ctl_en         @O @S 14    
tst_c_ctl_i[5:0]     @O @S 14    
tst_c_ctl_ld         @O @S 14    
tst_synclk_set       @O @S 14    
tst_pwr_up           @O @S 14    
tst_idd_test         @O @S 14    
tst_reset_l_0        @O @S 14    
tst_reset_l_1        @O @S 14    
tst_reset_l_2        @O @S 14    
tst_reset_l_3        @O @S 14    
tst_reset_l_4        @O @S 14    
tst_reset_l_5        @O @S 14    
tst_reset_l_6        @O @S 14    
tst_reset_l_7        @O @S 14    
tst_reset_l_8        @O @S 14    
tst_reset_l_9        @O @S 14    

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