rep.min.clock 2.76 KB
****************************************
Report : clock
Design : bb
Version: 2001.08-SP1
Date   : Thu Mar  6 02:08:28 2003
****************************************


Attributes:
    p - propagated_clock
    G - Generated clock

Clock          Period   Waveform            Attrs     Sources
--------------------------------------------------------------------------------
BBSTB            4.90   {3.5 5.95}          p         {PAD_MDQS0 PAD_MDQS1 PAD_MDQS2 PAD_MDQS3}
BBSTB_N          4.90   {5.95 8.4}                    {}
BBSTB_P          4.90   {3.5 5.95}                    {}
DBGCLK          19.60   {0 9.8}             p         {dbgclk_tree/N01}
DDRCLK           4.90   {2.45 4.9}                    {}
JTAGCLK         39.20   {0 19.6}            p         {tck_tree/N01}
MEMCLK           4.90   {0 2.45}            p         {pllx2/CLKOA}
SYSCLK           9.80   {0 4.9}             p         {PAD_SYSCLK}
USBCLK          19.60   {0 9.8}             p         {PAD_USBCLKI}
VCLOCK          19.60   {0 9.8}             p         {pllv/FO}

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****************************************
Report : clock_skew
Design : bb
Version: 2001.08-SP1
Date   : Thu Mar  6 02:08:28 2003
****************************************

              Min Rise  Min Fall  Max Rise  Max Fall     Hold          Setup
Object          Delay     Delay     Delay     Delay   Uncertainty   Uncertainty
--------------------------------------------------------------------------------
SYSCLK              -         -         -         -      0.10          0.10
MEMCLK              -         -         -         -      0.10          0.10
DDRCLK           0.00      0.00      0.00      0.00      0.25          0.25
BBSTB               -         -         -         -      0.50          0.50
USBCLK              -         -         -         -      0.10          0.10
DBGCLK              -         -         -         -      0.10          0.10
JTAGCLK             -         -         -         -      0.10          0.10

                Min Condition Source Latency      Max Condition Source Latency
--------------------------------------------------------------------------------
Object        Early_r Early_f  Late_r  Late_f   Early_r Early_f  Late_r  Late_f
--------------------------------------------------------------------------------
SYSCLK         -1.667  -1.667  -1.667  -1.667    -1.667  -1.667  -1.667  -1.667
MEMCLK         -0.967  -0.967  -0.967  -0.967    -0.967  -0.967  -0.967  -0.967


                From           To              Hold          Setup
                Object         Object       Uncertainty    Uncertainty
--------------------------------------------------------------------------------
              MEMCLK         SYSCLK       0.30              0.30
              SYSCLK         MEMCLK       0.30              0.30

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