#include <regdef.h>
#include <asm.h>
#include <R4300.h>
#include <PR/bcp.h>
#include <PR/bbdebug.h>
#include "test_vector.h"

static inline int do_virage_sram_test();
static inline int do_sram_test(unsigned int start, unsigned int end);
static inline int do_nec_iram_test_march(unsigned int start, unsigned int end);
static inline int do_nec_iram_test_check(unsigned int start, unsigned int end);

    /* Test all mi sram here */
int main()
{
    int err=0;

#ifdef NEC_IRAM_TEST
    #ifdef NEC_IRAM_MARCH
        err += do_nec_iram_test_march(INTERNAL_RAM_START, INTERNAL_RAM_END);
    #else
        err += do_nec_iram_test_check(INTERNAL_RAM_START, INTERNAL_RAM_END);
    #endif
#else
    err += do_virage_sram_test();
    err += do_sram_test(BOOT_RAM_LO_START, BOOT_RAM_LO_END);
    err += do_sram_test(INTERNAL_RAM_START, INTERNAL_RAM_END);
#endif

    if (err) { TEST_ERROR;}
    else {TEST_PASS;}

    for (;;);
    return 0;
}

static inline int do_sram_test(unsigned int start, unsigned int end)
{
    int err=0, data, addr, k;

    /* change to cache space */
    start |= K1BASE;
    end |= K1BASE;

         /* walk through address line */
    *((unsigned int *) start) = 0x12345678;
    for (addr=start, k=4; (addr+k)<end; k<<=1) {
        data = (k & 0xff) | ((~k & 0xff) << 8);
        data |= (~data << 16);

        *((unsigned int *) (addr + k)) = data;               
    }
    *((unsigned int *) (end -4)) = 0xbabecafe;

    if ( *((unsigned int *) start) != 0x12345678 )  err++;
    for (addr=start, k=4; (addr+k)<end; k<<=1) {
         data = (k & 0xff) | ((~k & 0xff) << 8);
         data |= (~data << 16);
         if (*((unsigned int *) (addr + k)) != data)  err++;
    }
    if ( *((unsigned int *) (end-4)) != 0xbabecafe )  err++;

                /* 1 Walk through data line */
    for (k=0; k<32; k++) {
        data = 1 << k;
        *((unsigned int *) start) = data;
        if ( *((unsigned int *) start) != data) err++;
    }

    return err;
}

static inline int  do_virage_sram_test()
{
    int err = 0;
    err += do_sram_test(VIRAGE0_RAM_START, VIRAGE0_RAM_END );
    err += do_sram_test(VIRAGE1_RAM_START, VIRAGE1_RAM_END );
    IO_WRITE(VIRAGE2_CTRL_REG, 0);
    err += do_sram_test(VIRAGE2_RAM_START, VIRAGE2_RAM_END );

    return err;
}

#define IRAM_DATA_OUTPUT  K1BASE
#define RSP_RET_ADDR  0x7FFFC0

static inline int do_nec_iram_test_march(unsigned int start, unsigned int end)
{
    unsigned int *p_iram, *p_ddr, *p_iram_end, *p_iram_start;
    unsigned int v, data, v1, dummy;

#ifdef PATTERN_0
    v = 0;
#else
    v = 0xffffffff;
#endif
    v1 = (~v)  & 0xffffffff;

    p_iram = p_iram_start = (unsigned int *) (start | K1BASE);
    p_iram_end = (unsigned int *) (end | K1BASE);
    p_ddr = (unsigned int *) IRAM_DATA_OUTPUT;

    /*  1st write */
    while (p_iram < p_iram_end) 
        *p_iram++ = v;

    /* 2nd write */
    p_iram = (unsigned int *) (start | K1BASE);
    while (p_iram < p_iram_end) {
        data = *p_iram;
        *p_iram = v1;
        dummy = IO_READ((u32) p_iram);
        p_iram++;
        *p_ddr++ = data;
    }

    /* 3rd write */
    p_iram = p_iram_end - 1;
    while (p_iram >= p_iram_start) {
        data = *p_iram;
        *p_iram = v;
        dummy = IO_READ((u32) p_iram);
        p_iram--;
        *p_ddr++ = data; 
    }

    /* 4th write */  
    p_iram = p_iram_end - 1;
    while (p_iram >= p_iram_start) {
        data = *p_iram;
        *p_iram = v1;
        dummy = IO_READ((u32) p_iram);
        p_iram--;
        *p_ddr++ = data; 
    }

    IO_WRITE(RSP_RET_ADDR, 1);
    return 0;    
}


static inline int do_nec_iram_test_check(unsigned int start, unsigned int end)
{
    unsigned int v, data, dummy, ddr;
    int i, addr;
    unsigned int *p_iram, *p_ddr, *p_iram_end, *p_iram_start;

#ifdef PATTERN_0
    v = 0;
#else
    v = 0xffffffff;
#endif

    /* 1st write */
    ddr = IRAM_DATA_OUTPUT;
    for (addr=start, i=0 ; addr<end; addr+=sizeof(int), i++) {
        IO_WRITE(addr, v);
        v = (~v) & 0xffffffff;
        if ((i & 0xf) == 0xf) 
            v = (~v) & 0xffffffff;
    } 

    p_iram = p_iram_start = (unsigned int *) (start | K1BASE);
    p_iram_end = (unsigned int *) (end | K1BASE);
    p_ddr = (unsigned int *) IRAM_DATA_OUTPUT;

    /* 2nd write */
    while (p_iram < p_iram_end) {
        data = *p_iram;
        *p_iram = (~data) & 0xffffffff;
        dummy = IO_READ((u32) p_iram);
        p_iram++;
        *p_ddr++ = data;
    }    

    /* 3rd write */
    p_iram  = p_iram_end - 1;
    while (p_iram >= p_iram_start) {
        data = *p_iram;
        *p_iram = (~data) & 0xffffffff;
        dummy = IO_READ((u32) p_iram);
        p_iram--;
        *p_ddr++ = data;
    }

    /* 4th write */
    p_iram  = p_iram_end - 1;
    while (p_iram >= p_iram_start) {
        data = *p_iram;
        *p_iram = (~data) & 0xffffffff;
        dummy = IO_READ((u32) p_iram);
        p_iram--;
        *p_ddr++ = data;
    }

    IO_WRITE(RSP_RET_ADDR, 1);
    return 0;
}