piapp.c
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/**************************************************************************
*
* PI test program to be run on the target R4300. By default (with flag
* _STANDALONE disabled), this program requires "dbgif" to run on the
* INDY for rmonPrintf to work. This program also requires the libultra_d.a
* library (which is from PR/libultra).
*
* $Revision: 1.1.1.1 $
*
*/
#include <stdarg.h>
#include "ultra64.h"
#include "boot.h"
#include "log.h"
static void nullproc(...);
#ifndef _STANDALONE
#undef LogEntry
#define LogEntry(a)
#undef LogInit
#define LogInit()
#ifdef PRINTF
#undef PRINTF
#endif
#define PRINTF rmonPrintf
#else
#define PRINTF nullproc
#endif /* STANDALONE */
/**************************************************************************
*
* Main definitions
*
*/
#define DIR_READ 0 /* Rdram <- device */
#define DIR_WRITE 1 /* Rdram -> device */
/*
* ROM and RDRAM test addresses
*/
/* (Domain2:address2) + 1 MB */
#define PI_ROM_ADDRESS (PI_DOM1_ADDR2+0x100000)
#define PI_RDRAM_ADDRESS 0x00050000 /* 64*5 KB boundary */
#define PI_TEST_START 0x12345678
#define PI_TEST_REG 0x0001
#define PI_TEST_IO 0x0002
#define PI_TEST_DMA_INIT 0x0003
#define PI_TEST_DMA 0x0004
#define PI_TEST_RESET 0x0005
#define PI_COMPARE 0x0006
#define PI_DONE 0xbeef
#define START_DMA_ADDRESS 0x00200000
#define ERROR_COMPARE_ADDRESS 0x00200004
/**************************************************************************
*
* Function prototypes
*
*/
static int piTestReg(void);
static int piTestIo(void);
static int piTestDma(void);
static int piTestReset(void);
static int piTestConfigRead(void);
static int piTestConfigWrite(void);
static int piPollStatus(unsigned int, int);
static int piIoWrite(unsigned int, unsigned int);
static unsigned int piIoRead(unsigned int);
static int piDmaCopy(int, unsigned int, unsigned int, int);
static int piCompare(unsigned int, unsigned int, int);
static void piConfigDomain(unsigned int, int, int, int, int);
static void piGetDomainParam(unsigned int, int *, int *, int *,
int *);
static void myPrintf(const char *, ...);
/**************************************************************************
*
* Extern functions
*
*/
#ifdef _STANDALONE
extern void LogInit(void);
extern void LogEntry(unsigned int);
extern void InitProgram(void);
extern void EndProgram(void);
#endif
static unsigned int errorTotal;
static int latency, pulseWidth, pageSize, release;
char BootStack[STACKSIZE];
static void startproc(void *);
static void main(void *);
static OSThread startThread;
static char startThreadStack[STACKSIZE];
static OSThread mainThread;
static char mainThreadStack[STACKSIZE];
static OSThread rmonThread;
static char rmonThreadStack[STACKSIZE];
#define NUM_PI_MSGS 8
static OSMesg PiMessages[NUM_PI_MSGS];
static OSMesgQueue PiMessageQ;
#ifndef _STANDALONE
void
boot(void *arg)
{
/* Initiliaze OS parameters and structures */
osInitialize();
/*
* Create start thread
*/
osCreateThread(&startThread, 3, startproc, arg,
startThreadStack+STACKSIZE, 10);
osStartThread(&startThread);
}
static void
startproc(void *arg)
{
/*
* Start PI Mgr for access to cartridge
*/
osCreatePiManager((OSPri)OS_PRIORITY_PIMGR, &PiMessageQ, PiMessages,
NUM_PI_MSGS);
/*
* Start RMON for debugging & data xfer (make sure to start
* PI Mgr first)
*/
osCreateThread(&rmonThread, 0, rmonMain, (void *)0,
rmonThreadStack+STACKSIZE, OS_PRIORITY_RMON);
osStartThread(&rmonThread);
/*
* Create main thread
*/
osCreateThread(&mainThread, 6, main, arg,
mainThreadStack+STACKSIZE, 10);
osStartThread(&mainThread);
/*
* Become the idle thread
*/
osSetThreadPri( 0, 0 );
osPause();
osExit();
}
#else
void
boot(void)
{
/* Initialize logging mechanism */
LogInit();
LogEntry(PI_TEST_START);
LogEntry(IO_READ(PI_STATUS_REG));
/* Clear all RCP interrupt masks */
IO_WRITE(MI_INTR_MASK_REG, (MI_INTR_MASK_CLR_SP | MI_INTR_MASK_CLR_SI |
MI_INTR_MASK_CLR_AI | MI_INTR_MASK_CLR_VI | MI_INTR_MASK_CLR_PI |
MI_INTR_MASK_CLR_DP));
/* Clear SP interrupt */
IO_WRITE(SP_STATUS_REG, SP_CLR_INTR);
/* Clear VI interrupt */
IO_WRITE(VI_CURRENT_REG, 0);
/* Clear AI interrupt */
IO_WRITE(AI_STATUS_REG, 1);
/* Clear PI interrupt */
IO_WRITE(PI_STATUS_REG, PI_CLR_INTR);
/* Clear SI interrupt */
IO_WRITE(SI_STATUS_REG, 1);
/* Clear DP interrupt */
IO_WRITE(MI_MODE_REG, MI_CLR_DP_INTR);
errorTotal = 0;
errorTotal = piTestReg();
errorTotal += piTestIo();
errorTotal += piTestDma();
errorTotal += piTestReset();
if (errorTotal != 0) {
LogEntry(PI_DONE|0xdead0000);
LogEntry(errorTotal);
}
else {
LogEntry(PI_DONE);
}
for (;;) {}
}
#endif /* _STANDALONE */
static void
main(void *arg)
{
int lat, pwd, pgs, rel;
latency = 0x10;
pulseWidth = 0x10;
pageSize = 1;
release = 3;
piConfigDomain(PI_DOMAIN1_REG, latency, pulseWidth, pageSize, release);
PRINTF("\n==> MAIN:\tHello, I'm alive \n");
PRINTF("==> MAIN: config parameters: lat=0x%02x, pwd=0x%02x, pgs=%2d, rls=%d\n",
latency, pulseWidth, pageSize, release);
errorTotal = 0;
errorTotal = piTestReg();
errorTotal += piTestIo();
errorTotal += piTestDma();
errorTotal += piTestReset();
errorTotal += piTestConfigRead();
errorTotal += piTestConfigWrite();
piGetDomainParam(PI_DOMAIN1_REG, &lat, &pwd, &pgs, &rel);
PRINTF("\n==> MAIN: config parameters: lat=0x%02x, pwd=0x%02x, pgs=%2d, rls=%d\n",
lat, pwd, pgs, rel);
PRINTF("==> MAIN:\tTotal errors = %d \n", errorTotal);
if (errorTotal != 0) {
LogEntry(PI_DONE|0xdead0000);
LogEntry(errorTotal);
}
else {
LogEntry(PI_DONE);
}
for (;;) {}
} /* main */
/**************************************************************************
*
* Main PI test functions
*
**************************************************************************/
/**************************************************************************
* Perform PI I/O write/read test
*/
static int
piIoWRTest(unsigned int addr, unsigned int wdata)
{
unsigned int rdata;
piIoWrite(addr, wdata);
rdata = piIoRead(addr);
if (rdata != wdata) {
PRINTF("====> piIoWRTest: failed: addr=%08x, wdata=%08x, rdata=%08x \n",
addr, wdata, rdata);
LogEntry(PI_TEST_IO| 0xdead0000);
LogEntry(addr);
LogEntry(wdata);
LogEntry(rdata);
return(1);
}
return(0);
} /* piIoWRTest */
/**************************************************************************
* REGISTER TESTS
**************************************************************************/
/* Data table */
static unsigned int regDataTable[] = {
0x12345678, 0x00000000, 0xFFFFFFFF, 0xAAAAAAAA, 0x55555555, 0xDEADBEEF
};
static unsigned int regDataTableSize= sizeof(regDataTable)/sizeof(unsigned int);
int
piTestReg(void)
{
int i, errorCount = 0;
unsigned int w;
/*
* For each register address, test it with all the pattern data in
* data table.
*/
LogEntry(PI_TEST_REG| 0x11110000);
PRINTF("==> piTestReg:\tentered\n");
/* We need to wait for PIC to be idle before we can write to any regs */
piPollStatus(PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY, 1);
for (i = 0; i < regDataTableSize; i++) {
IO_WRITE(PI_DRAM_ADDR_REG, regDataTable[i]);
w = IO_READ(PI_DRAM_ADDR_REG);
if ((regDataTable[i] & 0x00FFFFFE) != w) {
PRINTF("====> piTestReg: failed: reg=%08x, data=%08x, exp=%08x \n",
PI_DRAM_ADDR_REG, w, (regDataTable[i] & 0x00fffffe));
LogEntry(PI_TEST_REG| 0xdead0000);
LogEntry(regDataTable[i] & 0x00FFFFFE);
LogEntry(w);
piPollStatus(PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY, 1);
errorCount++;
}
}
LogEntry(PI_TEST_REG| 0x22220000);
/* We need to wait for PIC to be idle before we can write to any regs */
piPollStatus(PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY, 1);
for (i = 0; i < regDataTableSize; i++) {
IO_WRITE(PI_CART_ADDR_REG, regDataTable[i]);
w = IO_READ(PI_CART_ADDR_REG);
if ((regDataTable[i] & 0xFFFFFFFE) != w) {
PRINTF("====> piTestReg: failed: reg=%08x, data=%08x, exp=%08x \n",
PI_CART_ADDR_REG, w, (regDataTable[i] & 0xfffffffe));
LogEntry(PI_TEST_REG| 0xdead0000);
LogEntry(regDataTable[i] & 0xFFFFFFFE);
LogEntry(w);
piPollStatus(PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY, 1);
errorCount++;
}
}
PRINTF("==> piTestReg:\tfinished with %3d error(s)\n", errorCount);
return(errorCount);
} /* piTestReg */
/**************************************************************************
* PIO TESTS
**************************************************************************
* Perform IO Write/Read from different PI ROM address space
*/
/* Address and data tables */
static unsigned int ioAddrTable[] = {
PI_ROM_ADDRESS, PI_ROM_ADDRESS+4,
PI_ROM_ADDRESS+8, PI_ROM_ADDRESS+0x0c,
PI_ROM_ADDRESS+0x1000, PI_ROM_ADDRESS+0x1004,
PI_ROM_ADDRESS+0x1008, PI_ROM_ADDRESS+0x100c
};
static unsigned int ioAddrTableSize= sizeof(ioAddrTable)/sizeof(unsigned int);
static unsigned int ioDataTable[] = {
0x00000000, 0xFFFFFFFF, 0xAAAAAAAA, 0x55555555, 0xA5A5A5A5, 0x5A5A5A5A
};
static unsigned int ioDataTableSize= sizeof(ioDataTable)/sizeof(unsigned int);
int
piTestIo(void)
{
int i, j;
int errorCount = 0;
/*
* Write/Read ROM with pattern data
*/
PRINTF("==> piTestIo:\tentered\n");
LogEntry(PI_TEST_IO);
for (i = 0; i < ioAddrTableSize; i++) {
for (j = 0; j < ioDataTableSize; j++) {
if (piIoWRTest(ioAddrTable[i], ioDataTable[j])) {
errorCount++;
}
}
}
PRINTF("==> piTestIo:\tfinished with %3d error(s)\n", errorCount);
return(errorCount);
} /* piTestIo */
/**************************************************************************
* DMA TESTS
**************************************************************************
*
* - Perform DMA to/from different ROM address space with different size
* (2B (minimum), 4B, 8B, 32B, 128B, 256B, 264B, 1024B)
*/
static unsigned int dmaSzTable[] = {
4, 6, 8, 32, 128, 132, 256, 264, 512, 1024, (64*1024), (128*1024),
(512*1024)
};
static unsigned int dmaSzTableSize= sizeof(dmaSzTable)/sizeof(unsigned int);
int
piTestDma(void)
{
int i, j, ret, size;
unsigned int romAddr, ramAddr, data, exp;
int errorCount = 0;
/*
* Initialize RamRom (4 MB) with data
*/
PRINTF("==> piTestDma:\tentered\n");
/* PRINTF("====> piTestDma: initializing ROM\n"); */
LogEntry(PI_TEST_DMA_INIT);
data = 0x12345678;
for (i = 0; i < 0x100000; i++) {
romAddr = PI_ROM_ADDRESS+(i*4);
data = romAddr;
if (piIoWRTest(romAddr, data)) {
errorCount++;
}
}
ramAddr = PI_RDRAM_ADDRESS;
romAddr = PI_ROM_ADDRESS;
/* DMA: 2 bytes ROM -> RDRAM */
/* PRINTF("====> piTestDma: size=2 bytes\n"); */
LogEntry(PI_TEST_DMA|0x00020000);
piDmaCopy(DIR_READ, romAddr, ramAddr, 2); /* Start DMA */
piPollStatus(PI_STATUS_DMA_BUSY, 1); /* Wait for DMA busy to clear */
if (piCompare(romAddr, ramAddr, 2)) { /* Compare data */
PRINTF("====> piTestDma: compare failed: rom=%08x, dram=%08x, size=%d\n", romAddr, ramAddr, 2);
errorCount++;
}
/* errlog(DEBUG, "--- PI DMA: checking for interrupt"); */
#ifdef _STANDALONE
LogEntry(PI_TEST_DMA|0x00021000);
piPollStatus(0x08, 0); /* Wait for interrupt bit set */
IO_WRITE(PI_STATUS_REG, PI_CLR_INTR); /* Clear interrupt */
piPollStatus(0x08, 1); /* Interrupt bit should clear */
#endif
ramAddr = (ramAddr+8) & 0xFFFFFFF8;
romAddr = (romAddr+4) & 0xFFFFFFFC;
/* DMA: X bytes ROM -> RDRAM */
for (i = 0; i < dmaSzTableSize; i++) {
size = dmaSzTable[i];
/* PRINTF("====> piTestDma: size=%d bytes\n", size); */
LogEntry(PI_TEST_DMA| (size << 16));
piDmaCopy(DIR_READ, romAddr, ramAddr, size); /* Start DMA */
piPollStatus(PI_STATUS_DMA_BUSY, 1); /* Wait for DMA busy to clear */
if (piCompare(romAddr, ramAddr, size)) { /* Compare data */
PRINTF("====> piTestDma: compare failed: rom=%08x, dram=%08x, size=%d\n", romAddr, ramAddr, size);
errorCount++;
}
ramAddr = (PI_RDRAM_ADDRESS+size+8) & 0xFFFFFFF8;
romAddr = (PI_ROM_ADDRESS +size+4) & 0xFFFFFFFC;
}
/* DMA (4MB - 64KB) from RamRom to RDRAM */
ramAddr = PI_RDRAM_ADDRESS;
romAddr = PI_ROM_ADDRESS;
LogEntry(PI_TEST_DMA| 0xeeee0000);
size = (1024*1024*4) - 0x50000;
/* PRINTF("====> piTestDma: size=%d bytes\n", size); */
piDmaCopy(DIR_READ, romAddr, ramAddr, size); /* Start DMA */
piPollStatus(PI_STATUS_DMA_BUSY, 1); /* Wait for DMA busy to clear */
if (piCompare(romAddr, ramAddr, size)) { /* Compare data */
PRINTF("====> piTestDma: compare failed: rom=%08x, dram=%08x, size=%d\n", romAddr, ramAddr, size);
errorCount++;
}
PRINTF("==> piTestDma:\tfinished with %3d error(s)\n", errorCount);
return(errorCount);
} /* piTestDma */
/**************************************************************************
* RESET TEST
**************************************************************************/
int
piTestReset(void)
{
int i, j, size;
unsigned int romAddr, ramAddr;
int errorCount = 0;
PRINTF("==> piTestReset:\tentered\n");
ramAddr = PI_RDRAM_ADDRESS;
romAddr = PI_ROM_ADDRESS;
LogEntry(PI_TEST_RESET); /* Log status register */
i = IO_READ(PI_STATUS_REG);
LogEntry(i);
size = 1024*100;
piDmaCopy(DIR_READ, romAddr, ramAddr, size); /* Start DMA */
/* Issue an PIO read to force error bit to set */
j = IO_READ(LOG_ADDRESS);
LogEntry(PI_TEST_RESET|0x11110000);
piPollStatus(PI_STATUS_DMA_BUSY, 1); /* Wait for DMA busy to clear */
if (piCompare(romAddr, ramAddr, size)) { /* Compare data */
PRINTF("==> piTestReset: 1st test failed!\n");
errorCount++;
}
/* Check for error bit set */
LogEntry(PI_TEST_RESET|0x22220000);
piPollStatus(PI_STATUS_ERROR, 0);
/* Reset the PI controller */
IO_WRITE(PI_STATUS_REG, PI_SET_RESET);
/* The error bit should clear */
LogEntry(PI_TEST_RESET|0x33330000);
piPollStatus(PI_STATUS_ERROR, 1);
/* Log the status register again */
LogEntry(IO_READ(PI_STATUS_REG));
/* Test reset again without waiting for DMA to complete */
size = 1024*1024;
piDmaCopy(DIR_READ, romAddr, ramAddr, size); /* Start DMA */
/* Issue an PIO read to force error bit to set */
j = IO_READ(LOG_ADDRESS);
/* Check for error bit set */
piPollStatus(PI_STATUS_ERROR, 0);
/* Reset the PI controller */
IO_WRITE(PI_STATUS_REG, PI_SET_RESET);
/* The error bit should clear */
piPollStatus(PI_STATUS_ERROR, 1);
piPollStatus(PI_STATUS_DMA_BUSY, 1); /* Wait for DMA busy to clear */
if (piCompare(romAddr, ramAddr, size)) { /* Compare data */
PRINTF("==> piTestReset: 2nd test failed but is expected!\n");
/* errorCount++; */
}
/*
* This test only works in uncached mode and slow RamRom speed due to the
* time delay
*/
#ifdef _UNCACHE
/* Issue 2 PIO reads to force error bit set */
j = IO_READ(LOG_ADDRESS);
j = IO_READ(LOG_ADDRESS);
/* Check for error bit set */
LogEntry(PI_TEST_RESET|0x44440000);
piPollStatus(PI_STATUS_ERROR, 0);
/* Reset the PI controller */
IO_WRITE(PI_STATUS_REG, PI_SET_RESET);
/* The error bit should clear */
LogEntry(PI_TEST_RESET|0x55550000);
piPollStatus(PI_STATUS_ERROR, 1);
/* Log the status register again */
LogEntry(IO_READ(PI_STATUS_REG));
#endif
PRINTF("==> piTestReset:\tfinished with %3d error(s)\n", errorCount);
return(errorCount);
} /* piTestReset */
/**************************************************************************
* CONFIG TEST
**************************************************************************/
/* Bit format: 0-7:latency, 8-15:pulse_width, 16-19:page_size, 20-21:release */
static unsigned int configTable[] = {
0x0030ffff, 0x00308080, 0x00304040, 0x00302020, 0x00301010, 0x00300a0a, 0x00300505,
0x0031ffff, 0x00318080, 0x00314040, 0x00312020, 0x00311010, 0x00310a0a, 0x00310505,
0x0032ffff, 0x00328080, 0x00324040, 0x00322020, 0x00322020, 0x00320a0a, 0x00320505,
0x0034ffff, 0x00348080, 0x00344040, 0x00342020, 0x00344040, 0x00340a0a, 0x00340505,
0x0038ffff, 0x00388080, 0x00384040, 0x00382020, 0x00388080, 0x00380a0a, 0x00380505,
0x003affff, 0x003a8080, 0x003a4040, 0x003a2020, 0x003a8080, 0x003a0a0a, 0x003a0505,
0x003cffff, 0x003c8080, 0x003c4040, 0x003c2020, 0x003cc0c0, 0x003c0a0a, 0x003c0505,
0x003effff, 0x003e8080, 0x003e4040, 0x003e2020, 0x003ee0e0, 0x003e0a0a, 0x003e0505,
/* 0x003fffff, 0x003f8080, 0x003f4040, 0x003f2020, 0x003ff0f0, 0x003f0a0a, 0x003f0505, */
0x0020ffff, 0x00208080, 0x00204040, 0x00202020, 0x00201010, 0x00200a0a, 0x00200505,
0x0021ffff, 0x00218080, 0x00214040, 0x00212020, 0x00211010, 0x00210a0a, 0x00210505,
0x0022ffff, 0x00228080, 0x00224040, 0x00222020, 0x00222020, 0x00220a0a, 0x00220505,
0x0024ffff, 0x00248080, 0x00244040, 0x00242020, 0x00244040, 0x00240a0a, 0x00240505,
0x0028ffff, 0x00288080, 0x00284040, 0x00282020, 0x00288080, 0x00280a0a, 0x00280505,
0x002affff, 0x002a8080, 0x002a4040, 0x002a2020, 0x002a8080, 0x002a0a0a, 0x002a0505,
0x002cffff, 0x002c8080, 0x002c4040, 0x002c2020, 0x002cc0c0, 0x002c0a0a, 0x002c0505,
0x002effff, 0x002e8080, 0x002e4040, 0x002e2020, 0x002ee0e0, 0x002e0a0a, 0x002e0505,
/* 0x002fffff, 0x002f8080, 0x002f4040, 0x002f2020, 0x002ff0f0, 0x002f0a0a, 0x002f0505, */
0x0010ffff, 0x00108080, 0x00104040, 0x00102020, 0x00101010, 0x00100a0a, 0x00100505,
0x0011ffff, 0x00118080, 0x00114040, 0x00112020, 0x00111010, 0x00110a0a, 0x00110505,
0x0012ffff, 0x00128080, 0x00124040, 0x00122020, 0x00122020, 0x00120a0a, 0x00120505,
0x0014ffff, 0x00148080, 0x00144040, 0x00142020, 0x00144040, 0x00140a0a, 0x00140505,
0x0018ffff, 0x00188080, 0x00184040, 0x00182020, 0x00188080, 0x00180a0a, 0x00180505,
0x001affff, 0x001a8080, 0x001a4040, 0x001a2020, 0x001a8080, 0x001a0a0a, 0x001a0505,
0x001cffff, 0x001c8080, 0x001c4040, 0x001c2020, 0x001cc0c0, 0x001c0a0a, 0x001c0505,
0x001effff, 0x001e8080, 0x001e4040, 0x001e2020, 0x001ee0e0, 0x001e0a0a, 0x001e0505,
/* 0x001fffff, 0x001f8080, 0x001f4040, 0x001f2020, 0x001ff0f0, 0x001f0a0a, 0x001f0505, */
0x0000ffff, 0x00008080, 0x00004040, 0x00002020, 0x00001010, 0x00000a0a, 0x00000505,
0x0001ffff, 0x00018080, 0x00014040, 0x00012020, 0x00011010, 0x00010a0a, 0x00010505,
0x0002ffff, 0x00028080, 0x00024040, 0x00022020, 0x00022020, 0x00020a0a, 0x00020505,
0x0004ffff, 0x00048080, 0x00044040, 0x00042020, 0x00044040, 0x00040a0a, 0x00040505,
0x0008ffff, 0x00088080, 0x00084040, 0x00082020, 0x00088080, 0x00080a0a, 0x00080505,
0x000affff, 0x000a8080, 0x000a4040, 0x000a2020, 0x000a8080, 0x000a0a0a, 0x000a0505,
0x000cffff, 0x000c8080, 0x000c4040, 0x000c2020, 0x000cc0c0, 0x000c0a0a, 0x000c0505,
0x000effff, 0x000e8080, 0x000e4040, 0x000e2020, 0x000ee0e0, 0x000e0a0a, 0x000e0505,
/* 0x000fffff, 0x000f8080, 0x000f4040, 0x000f2020, 0x000ff0f0, 0x000f0a0a, 0x000f0505, */
};
static unsigned int configTableSize= sizeof(configTable)/sizeof(unsigned int);
int
piTestConfigWrite(void)
{
int i, j, size;
unsigned int addr, rdata, exp, romAddr, ramAddr;
int errorCount = 0;
/* DMA from RamRom to RDRAM */
ramAddr = PI_RDRAM_ADDRESS;
romAddr = PI_ROM_ADDRESS;
size = (1024*1024*2);
PRINTF("==> piTestConfigWrite: entered (this test will take some time...)\n");
PRINTF("====> rom=0x%08x, ram=0x%08x, size=%d\n", romAddr, ramAddr, size);
PRINTF("====> Initializing RDRAM...\n");
addr = ramAddr;
for (i = 0; i < (size/4); i++) {
addr += 4;
IO_WRITE(addr, addr);
}
addr = ramAddr;
for (i = 0; i < (size/4); i++) {
addr += 4;
rdata = IO_READ(addr);
if (rdata != addr) {
PRINTF("====> Compare: failed: ram=%08x, wdata=%08x, rdata=%08x \n",
addr, addr, rdata);
errorCount++;
}
}
PRINTF("====> DMA data using different domain parameters ");
for (i = 0; i < configTableSize; i++) {
/* Clear ROM test area */
for (j = 0; j < (size/4); j++) {
piIoWrite(romAddr+(j*4), 0);
}
latency = configTable[i] & 0xff;
pulseWidth = (configTable[i] >> 8) & 0xff;
pageSize = (configTable[i] >> 16) & 0x0f;
release = (configTable[i] >> 20) & 0x03;
PRINTF(".");
/* PRINTF("Config parameters: lat=0x%02x, pwd=0x%02x, pgs=%2d, rls=%d\n",
latency, pulseWidth, pageSize, release); */
piConfigDomain(PI_DOMAIN1_REG, latency, pulseWidth, pageSize, release);
piDmaCopy(DIR_WRITE, romAddr, ramAddr, size); /* Start DMA */
piPollStatus(PI_STATUS_DMA_BUSY, 1); /* Wait for DMA busy to clear */
if (piCompare(romAddr, ramAddr, size)) { /* Compare data */
PRINTF("\nConfig parameters: lat=0x%02x, pwd=0x%02x, pgs=%2d, rls=%d\n",
latency, pulseWidth, pageSize, release);
errorCount++;
} /* if */
} /* for */
PRINTF("\n==> piTestConfigWrite: finished with %3d error(s)\n", errorCount);
return(errorCount);
} /* piTestConfigWrite */
int
piTestConfigRead(void)
{
int i, j, size;
unsigned int addr, rdata, exp, romAddr, ramAddr;
int errorCount = 0;
/* DMA from RamRom to RDRAM */
ramAddr = PI_RDRAM_ADDRESS;
romAddr = PI_ROM_ADDRESS;
size = (1024*1024*2);
PRINTF("==> piTestConfigRead: entered (this test will take some time...)\n");
PRINTF("====> rom=0x%08x, ram=0x%08x, size=%d\n", romAddr, ramAddr, size);
PRINTF("====> Initializing ROM... \n");
addr = romAddr;
for (i = 0; i < (size/4); i++) {
addr += 4;
piIoWrite(addr, addr);
}
addr = romAddr;
for (i = 0; i < (size/4); i++) {
addr += 4;
rdata = piIoRead(addr);
if (rdata != addr) {
PRINTF("====> Compare: failed: rom=%08x, wdata=%08x, rdata=%08x \n",
addr, addr, rdata);
errorCount++;
}
}
PRINTF("====> DMA data using different domain parameters ");
for (i = 0; i < configTableSize; i++) {
/* Clear RDRAM test area */
for (j = 0; j < (size/4); j++) {
IO_WRITE(ramAddr+(j*4), 0);
}
latency = configTable[i] & 0xff;
pulseWidth = (configTable[i] >> 8) & 0xff;
pageSize = (configTable[i] >> 16) & 0x0f;
release = (configTable[i] >> 20) & 0x03;
PRINTF(".");
/* PRINTF("Config parameters: lat=0x%02x, pwd=0x%02x, pgs=%2d, rls=%d\n",
latency, pulseWidth, pageSize, release); */
piConfigDomain(PI_DOMAIN1_REG, latency, pulseWidth, pageSize, release);
piDmaCopy(DIR_READ, romAddr, ramAddr, size); /* Start DMA */
piPollStatus(PI_STATUS_DMA_BUSY, 1); /* Wait for DMA busy to clear */
if (piCompare(romAddr, ramAddr, size)) { /* Compare data */
PRINTF("\nConfig parameters: lat=0x%02x, pwd=0x%02x, pgs=%2d, rls=%d\n",
latency, pulseWidth, pageSize, release);
errorCount++;
} /* if */
} /* for */
PRINTF("\n==> piTestConfigRead: finished with %3d error(s)\n", errorCount);
return(errorCount);
} /* piTestConfigRead */
/**************************************************************************
*
* The following functions are derived from IOSIM environment
*
**************************************************************************/
/**************************************************************************
* Configure the PI domain registers for better throughput
*/
void
piConfigDomain(unsigned int domReg, int lat, int pwd, int pgs, int rls)
{
IO_WRITE(domReg+PI_DOM_LAT_OFS, lat & 0xFF);
IO_WRITE(domReg+PI_DOM_PWD_OFS, pwd & 0xFF);
IO_WRITE(domReg+PI_DOM_PGS_OFS, pgs & 0x0F);
IO_WRITE(domReg+PI_DOM_RLS_OFS, rls & 0x03);
}
void
piGetDomainParam(unsigned int domReg, int *lat, int *pwd, int *pgs, int *rls)
{
*lat = IO_READ(domReg+PI_DOM_LAT_OFS);
*pwd = IO_READ(domReg+PI_DOM_PWD_OFS);
*pgs = IO_READ(domReg+PI_DOM_PGS_OFS);
*rls = IO_READ(domReg+PI_DOM_RLS_OFS);
}
/**************************************************************************
* Poll PI status register for bit pattern to either be set or cleared
*/
static int
piPollStatus(unsigned int bits, int cleared)
{
/* Poll PI status register for the statBits set */
unsigned int stat;
while (1) {
stat = IO_READ(PI_STATUS_REG);
if (cleared) {
if (!(stat & bits)) break;
}
else {
if (stat & bits) break;
}
}
return((int)stat);
} /* piPollStatus */
/**************************************************************************
* Perform PI I/O write
*/
int
piIoWrite(unsigned int addr, unsigned int data)
{
piPollStatus(PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY, 1);
IO_WRITE(addr, data);
return(0);
} /* piIoWrite */
/**************************************************************************
* Perform PI I/O read
*/
unsigned int
piIoRead(unsigned int addr)
{
unsigned int data;
piPollStatus(PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY, 1);
data = IO_READ(addr);
return(data);
} /* piIoRead */
/**************************************************************************
* Start PI DMA transaction between RDRAM and ROM
*/
int
piDmaCopy(int dir, unsigned int piAddr, unsigned int dramAddr, int length)
{
int ret;
unsigned int stat;
ret = 0;
piPollStatus(PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY, 1);
IO_WRITE(PI_DRAM_ADDR_REG, dramAddr);
IO_WRITE(PI_CART_ADDR_REG, piAddr);
switch (dir) {
case DIR_READ: { /* PI -> RDRAM */
IO_WRITE(PI_WR_LEN_REG, length-1);
break;
}
case DIR_WRITE: { /* PI <- RDRAM */
IO_WRITE(PI_RD_LEN_REG, length-1);
break;
}
default: {
ret = 1;
}
} /* switch */
return(ret);
} /* piDmaCopy */
/**************************************************************************
* Perform 32-bit compare between PI and RDRAM
*/
int
piCompare(unsigned int piAddr, unsigned int rdramAddr, int nbytes)
{
/* Compare 'nbytes' bytes between source 'piAddr' and destination
* 'rdramAddr'
* 'nbytes' must be even and addresses word-aligned
*/
int i, errorCount;
unsigned int w1, w2;
errorCount = 0;
piAddr &= 0xFFFFFFFC; /* Ensure addresses are word-aligned */
rdramAddr &= 0xFFFFFFFC;
i = 0;
while (i < nbytes) {
w1 = piIoRead(piAddr+i);
w2 = IO_READ(rdramAddr+i);
i += 4;
if (i > nbytes ) {
/* Here, compare the LSB 2 bytes only */
if ((w1 & 0xFFFF0000) != (w2 & 0xFFFF0000)) {
/* PRINTF("====> piCompare: failed: rom=%08x:%08x, ram=%08x:%08x \n", piAddr+(i-4), w1, rdramAddr+(i-4), w2); */
LogEntry(PI_TEST_IO| 0xdead0000);
LogEntry(PI_COMPARE|0xdead0000);
LogEntry(piAddr+(i-4));
LogEntry(w1 & 0xFFFF0000);
LogEntry(rdramAddr+(i-4));
LogEntry(w2 & 0xFFFF0000);
errorCount++;
/* break; */
}
} else
if (w1 != w2) {
/* PRINTF("====> piCompare: failed: rom=%08x:%08x, ram=%08x:%08x \n", piAddr+(i-4), w1, rdramAddr+(i-4), w2); */
LogEntry(PI_COMPARE|0xdead0000);
LogEntry(piAddr+(i-4));
LogEntry(w1);
LogEntry(rdramAddr+(i-4));
LogEntry(w2);
errorCount++;
/* break; */
}
} /* while */
if (errorCount)
PRINTF("====> piCompare failed: %d locations\n", errorCount);
return(errorCount);
} /* piCompare */
static void
myPrintf(const char *fmt, ...)
{
va_list ap;
va_start(ap, fmt);
/* Configure to something that we know works */
piConfigDomain(PI_DOMAIN1_REG, 0x10, 0x10, 1, 3);
rmonPrintf(fmt, ap);
/* Restore previous settings */
piConfigDomain(PI_DOMAIN1_REG, latency, pulseWidth, pageSize, release);
va_end(ap);
}
static void
nullproc(...)
{
}