#include "pi_util.h"
#include "pi_tests.h"

/* 16MByte, 16MByte, 32MByte, 64MByte */
const u32 flashSimDeviceSize[] = {0x1000000,0x1000000,0x2000000,0x4000000};
#ifdef TOSHIBA_FLASH
const u16 expectedIds[] = {0x9873,0x9873,0x9875,0x9876};
#else
const u16 expectedIds[] = {0xec73,0xec73,0xec75,0xec76};
#endif


void IoTestAll(char *flashInitFileName,int isGateLevel)
{
    int ret, errCount;
    int num_blocks =0;
    int result = PASS;
    int offset =0;
    u32 val;
    
    unsigned int seed;
    int i;

    FILE *fp;

    /* some log output settings hardcoded for now */
    Dflags |= DLOG | DSTATUS | DERROR;


    displayMsg("Beginning PI functional testing.");

    /* enter secure mode. We'll remain in secure mode until testing
       PI_ACCESS further down. After tests that issue pin reset,
       a re-entry into secure mode should be done. */
    IO_READ(MI_SEC_MODE_REG);
    IO_READ(BOOT_RAM_LO_START);

    /* if running gate-level testing, just run the tests
     * in the block below and return.
     */
    if(isGateLevel){
        /* enable writing to flash and set flash timing */
        initFlash();

        /* flash controller and ecc for gate-level */
        eccSingleBitGateLevel(0,IS_BIG_DEVICE(flashSimDeviceSize[0]));

        /* aes for gate level */
        aesGateLevel();
        
        /*
         * Exit secure mode
         */
        val = IO_READ(MI_SEC_MODE_REG);
        val = val & 0x42;
        IO_WRITE(MI_SEC_MODE_REG, val);

        return;
    }

    /* Do a pin reset for reset state test */
    displayMsg("PI functional test issuing pin reset.");
    _TRACE(DLOG, fprintf(LogFp,"Doing a pin reset\n"));
    fflush(NULL);
    pin_reset();

    /* re-enter secure mode after pin reset */
    IO_READ(MI_SEC_MODE_REG);
    IO_READ(BOOT_RAM_LO_START);

    /*
     * Reset register state testing
     */
    displayMsg("Starting PI RegResetStateTest test.");
    RegResetStateTest();

    /* many tests use rand(), so seed here */
    seed = getpid();
    srand(seed);
    _TRACE(DSTATUS,fprintf(LogFp,"Initial seed = %d\n",seed));

    /* GPIO tests issue multiple pin resets, so do these before 
     * init DDR and flash 
     */

    /*
     * GPIO, 1 (GPIO board-id)
     */
    displayMsg("Starting PI gpioBoardId test.");
    gpioBoardId();

    /*
     * GPIO, 2 (GPIO signals)
     */
    displayMsg("Starting PI gpioSignals test.");
    gpioSignals();

    /* re-enter secure mode since gpioSignals() issues reset */
    IO_READ(MI_SEC_MODE_REG);
    IO_READ(BOOT_RAM_LO_START);

    _TRACE(DLOG, fprintf(LogFp,"Initializing DDR and flash\n"));
    fflush(NULL);
    /* initialize DDR */
    displayMsg("PI functional test initializing DDR.");
    ret = InitDDR(0x0, 0x0, 0x0, 0x0);

    /* enable writing to flash and set flash timing */
    initFlash();

    /*
     * Memory Module Indicators
     */
    displayMsg("Starting PI memModIndicators test.");
    memModIndicators();

    /*
     * Flash Controller, 1 (Read ID)
     */
    displayMsg("Starting PI flashCtlReadId test.");
    flashCtlReadId(expectedIds);

    /* 
     * ATB tests (all) 
     *   NOTE: THIS MUST BE CALLED BEFORE FLASH TESTS THAT
     *         ERASE BLOCKS!!!
     */

    displayMsg("Starting PI piAtbDmaTest test.");
    piAtbDmaTest(flashInitFileName);

    /* make sure we're in secure mode after first set of atb tests */
    IO_READ(MI_SEC_MODE_REG);
    IO_READ(BOOT_RAM_LO_START);

    displayMsg("Starting PI piAtbDmaIntTest test.");
    piAtbDmaIntTest(flashInitFileName);

    displayMsg("Starting PI piAtbDmaErrTest test.");
    piAtbDmaErrTest(flashInitFileName);

    displayMsg("Starting PI piAtbDmaPioTest test.");
    piAtbDmaPioTest(flashInitFileName);

    /*
     * Flash Controller, 2 (Full-page Read Operation)
     */
    displayMsg("Starting PI flashCtlFullPageRead test.");
    flashCtlFullPageRead(flashInitFileName,flashSimDeviceSize);

    /*
     * Flash Controller, 3 (Block Operations)
     */
    displayMsg("Starting PI flashCtlBlockOperations test.");
    flashCtlBlockOperations(flashSimDeviceSize);

    /*
     * Flash Controller, 4 (Read over buffer offsets)
     */
    displayMsg("Starting PI flashCtlPartialPageReads test.");
    flashCtlPartialPageReads(flashSimDeviceSize);

    /*
     * Flash Controller, 5 (OOB read buffer packing)
     */
    displayMsg("Starting PI flashCtlOobReadBufPack test.");
    flashCtlOobReadBufPack(flashSimDeviceSize);

    /*
     * Flash Controller. 6 (Interrupt tests)
     */

    /* The flash interrupt tests are done during
     * the other flash tests.  The list below doesn't
     * include all routines that test interrupts, but
     * shows all flash cmds are all covered.  "e&d" 
     * means tests for both intr enabled and disabled
     *
     *  0x00 read             -  e&d eccReadValid
     *  0x10 programm commit  -  same tests as page program
     *  0x50 read spare only  -  e&d flashCtlOobReadBufPack,
     *                               flashCtlPartialPageReads
     *  0x60 block erase      -  e flashBlockEraseRandom
     *                           d flashBlockEraseZero
     *                           e&d flashBlockEraseWalk
     *  0x70 read status      -  same tests as block erase
     *                           and page program
     *  0x80 page program     -  e&d flashFullPageProgCheck,
     *                               flashFullPageProgWalk
     *  0x90 read ID          -  e&d flashCtlReadId
     *  0xd0 erase commit     -  same tests as block erase
     */

    /*
     * Flash Controller. 7 (Stop bit and reset command)
     */
    displayMsg("Starting PI flashCtlStopAndReset test.");
    flashCtlStopAndReset(flashSimDeviceSize);

    /*
     * Flash Controller. 8 (Status failure)
     *     The flash status fail bit does not
     *     get set by either setting write
     *     protect or doing multiple prog's
     *     with no erase between. Therefore,
     *     this test does not pass.
     */
    /* flashCtlReadStatus(flashSimDeviceSize); */
    
    /*
     * Flash Controller. 9 (Module state)
     */
    displayMsg("Starting PI flashCtlModuleState test.");
    flashCtlModuleState(flashSimDeviceSize);

    /*
     * ECC, 1 (ECC generation)
     */
    displayMsg("Starting PI flashSimDeviceSize test.");
    eccGen(flashSimDeviceSize);

    /*
     * ECC, 2 (Read valid)
     */
    displayMsg("Starting PI eccReadValid test.");
    eccReadValid(flashSimDeviceSize);

    /*
     * ECC, 3 (Single bit error)
     */
    displayMsg("Starting PI eccSingleBitErr test.");
    eccSingleBitErr(flashSimDeviceSize);

    /*
     * ECC, 4 (Double bit error)
     * ECC, 5 (Mixed single/double error)
     */
    displayMsg("Starting PI eccDoubleBitErr test.");
    eccDoubleBitErr(flashSimDeviceSize);

    /* 
     * AES tests (all)  
     */
    displayMsg("Starting PI piAesTests test.");
    piAesTests();

    /*
     * PI Buffer DMA tests (all with no ints)
     */
    displayMsg("Starting PI piBufDmaTest test.");
    piBufDmaTest(); 

    /*
     * PI Buffer DMA tests for ints
     */
    displayMsg("Starting PI piBufDmaIntTest test.");
    piBufDmaIntTest();

    /*
     * PI Buffer DMA tests for errors
     */
    displayMsg("Starting PI piBufDmaErrTest test.");
    piBufDmaErrTest();

    /*
     * PI Buffer DMA test to insure removing module has no impact
     */
    displayMsg("Starting PI piBufDmaModTest test.");
    piBufDmaModTest();

    /*
     * Register i/o Testing
     */
    displayMsg("Starting PI piRegIoTest test.");
    piRegIoTest();

    /*
     * PI Buffer ATB Area PIO
     */
    displayMsg("Starting PI piAtbEntryIoTest Test.");
    piAtbEntryIoTest();

    /*
     * IDE Debug Port (full test of MI IDE int registers)
     */
    displayMsg("Starting PI ideDebugPort test.");
    ideDebugPort();

    /*
     * PI Access Control
     */
    displayMsg("Starting PI accCtrlTest test.");
    accCtrlTest(flashSimDeviceSize);

    /*
     * Exit secure mode
     */
    val = IO_READ(MI_SEC_MODE_REG);
    val = val & 0x42;
    IO_WRITE(MI_SEC_MODE_REG, val);
    
}