//****************************************************************************
//
// File: bist.tst 
//	 Test file for TMEM hardware memory selftestor
//
// File Format:
//
// t <id> <arg1> <arg2> <arg3> <arg4>	- Run test id with the 4 args
//						where id   = decimal number
//						      argX = hex number
// q					- Quit testing and shutdown verilog 
//					  server
// 
// Common Test IDs:
// ================
// 101 - MemReadCompare
// 102 - MemWrite
// 103 - MemWriteRead
// 104 - MemPollStatus
//
//	DMEM Address:	0x04000000 - 0x04000FFF
//	IMEM Address:	0x04001000 - 0x04001FFF
//
//****************************************************************************

// clear all bist field, bist_clear [2] = 1, bist_check, bist_go [1,0] = 0,
// read should show all 0s

t 0103 04200000 00000004 00000000 00000000

// trigger tester selftest force 1, bist_check [0] = 1
// don't read as bist_fail state is unknown

t 0102 04200000 00000001 00000000 00000000

// wait until bist_done [2] = 1

t 0104 04200000 00000004 00000000 00000000

// read and check bist_fail [10:3] = 0x7f8, bist_check [0] = 1, bist_go [1] = 0,
// bist_done [2] = 1

t 0101 04200000 000007fd 00000000 00000000

// clear bist_fail, clear bist_done, bist_clear [2] = 1
// trigger tester selftest force 0, bist_check[0] = 0
// keep bist_go [1] = 0
// don't read as bist_fail state is unknown

t 0102 04200000 00000004 00000000 00000000

// wait until bist_done [2] = 1

t 0104 04200000 00000004 00000000 00000000

// read and check bist_fail [10:3] = 7f8, bist_check [0] = 0, bist_go [1] = 0,
// bist_done [2] = 1

t 0101 04200000 000007fc 00000000 00000000

// clear all bist field, bist_clear [2] = 1, bist_check, bist_go [1,0] = 0,
// read should show all 0s

t 0103 04200000 00000004 00000000 00000000

// trigger bist_go to run memory test, bist_check [0] = 0, bist_go [1] = 1,
// clear_bist [2] = 0

t 0102 04200000 00000002 00000000 00000000

// wait until bist_done [2] = 1

t 0104 04200000 00000004 00000000 00000000

// read and check bist_fail [10:3] = 0, bist_check [0] = 0, bist_go [1] = 1,
// bist_done [2] = 1

t 0101 04200000 00000006 00000000 00000000

// halt testing
q