sprawdma.c
2.55 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
/*====================================================================
* sprawdma.c
*
* Copyright 1995, Silicon Graphics, Inc.
* All Rights Reserved.
*
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
* Inc.; the contents of this file may not be disclosed to third
* parties, copied or duplicated in any form, in whole or in part,
* without the prior written permission of Silicon Graphics, Inc.
*
* RESTRICTED RIGHTS LEGEND:
* Use, duplication or disclosure by the Government is subject to
* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
* in Technical Data and Computer Software clause at DFARS
* 252.227-7013, and/or in similar or successor clauses in the FAR,
* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
* Copyright Laws of the United States.
*====================================================================*/
/**************************************************************************
*
* $Revision: 1.1.1.2 $
* $Date: 2002/10/29 08:06:43 $
* $Source: /root/leakn64/depot/rf/sw/bbplayer/libultra/monegi/rsp/sprawdma.c,v $
*
**************************************************************************/
#include "osint.h"
#include "rcp.h"
#include "assert.h"
/*
* Name: __osSpRawStartDma
*
* Description:
* Based on the input direction (OS_READ or OS_WRITE), setup a DMA
* transfer between RDRAM and SP memory address space.
* devAddr and dramAddr specifies the DMA buffer address of SP
* memory and RDRAM, respectively. size contains the number of bytes to
* transfer. Note that these addresses must be 64-bit aligned and
* size must be a multiple of 8 bytes. Maximum transfer size is
* 4 KBytes (12-bit).
* If the interface is busy, return a "-1" and abort the operation.
*
* Globals Referenced:
* None
*/
s32
__osSpRawStartDma(s32 direction, u32 devAddr, void *dramAddr, u32 size)
{
/* Length = {[31:20] skip, [19:12] count, [11:0] length} */
#ifdef _DEBUG
/* Ensure that addresses and size are 64-bit aligned */
assert((devAddr & 0x7) == 0);
assert(((u32)dramAddr & 0x7) == 0);
assert((size & 0x7) == 0);
#endif
/* Check for idle SP */
if (__osSpDeviceBusy())
return(-1);
IO_WRITE(SP_MEM_ADDR_REG, devAddr);
IO_WRITE(SP_DRAM_ADDR_REG, osVirtualToPhysical(dramAddr));
/* Note that actual programmed size of transfer = size - 1 */
if (direction == OS_READ) /* SP -> RDRAM */
IO_WRITE(SP_WR_LEN_REG, size-1);
else /* SP <- RDRAM */
IO_WRITE(SP_RD_LEN_REG, size-1);
return(0);
} /* __osSpRawStartDma */