test006.v
1.59 KB
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//
// test006 Vary number of bus sized transfers
//
task test006;
fork
test006_check;
test006_cmddata;
join
endtask
task test006_check;
integer i;
begin
check_unmasked("test006");
check_nosubblock("test006");
check_single("test006");
end
endtask
task test006_cmddata;
reg [CBUS_DATA_SIZE-1:0] address;
reg [DBUS_DATA_SIZE-1:0] actual_d_data;
reg [EBUS_DATA_SIZE-1:0] actual_e_data;
integer i, j;
begin
address = 0;
for (i = 1; i <= `MAX_TRANSFER; i = i + 1)
begin
cbus_dma_write(`DMA_UNMASKED, `DMA_UP, address, BUS_DEVICE_MI, -2, i*8);
while (!dma_start)
@(posedge clock);
for (j = 0; j < i; j = j + 1)
begin
dbus_data_out <= {2{address}};
ebus_data_out <= address[10:3];
@(posedge clock);
address = address + 8;
end
end
address = 0;
for (i = 1; i <= `MAX_TRANSFER; i = i + 1)
begin
cbus_dma_read(`DMA_NOSUBBLOCK, `DMA_UP, address, BUS_DEVICE_MI, 3, i*8);
while (!dma_start)
@(posedge clock);
for (j = 0; j < i; j = j + 1)
begin
check_data("test006", {2{address}}, dbus_data_reg,
address[10:3], ebus_data_reg);
@(posedge clock);
address = address + 8;
end
end
address = 0;
for (i = 1; i <= `MAX_TRANSFER; i = i + 1)
begin
for (j = 0; j < i; j = j + 1)
begin
cbus_dma_read(`DMA_NOSUBBLOCK, `DMA_UP, address, BUS_DEVICE_MI, 3, 8);
dbus_get_data(actual_d_data, actual_e_data, 3);
check_data("test006", {2{address}}, actual_d_data,
address[10:3], actual_e_data);
address = address + 8;
end
end
end
endtask