ginit.s 5.51 KB

/**************************************************************************
 *								          *
 *               Copyright (C) 1994, Silicon Graphics, Inc.       	  *
 *								          *
 *  These coded instructions, statements, and computer programs  contain  *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and  *
 *  are protected by Federal copyright  law.  They  may not be disclosed  *
 *  to  third  parties  or copied or duplicated in any form, in whole or  *
 *  in part, without the prior written consent of Silicon Graphics, Inc.  *
 *								          *
 *************************************************************************/

/*
 * File:		ginit.s
 * Creator:		acorn@sgi.com
 * Create Date:		3/14/95
 *
 * This in the init code for the 'graphics task' which used to be in gmain.s
 * but was moved to here so it could be overlayed with clip and light code.
 *
 * see the file goverlays.s for a description of how the overlays work and
 * how the ginit code is loaded.
 */


 ############################################################################
 #
 #  Begin task initialization
 #
 #  Register $1 holds the task header address
 # format for the task header:
 #	(see task.h)
 #
 #
		.ent	doInit
doInit:
	# set RSP yield flags to FALSE (IMPORTANT: don't clear yield flag)
		ori    $2,zero,(SP_CLR_YIELDED|SP_CLR_TASKDONE)
		mtc0   $2, SP_STATUS
	
	#
	# important constants:
	#
		lqv	vconst[0], VCONST_OFFSET(zero)
		lqv	vconst1[0], VCONST1_OFFSET(zero)
	
	#
	# The task header should tell us if this is a restart
	# of a previously checkpointed run. If so, do some special
	# init sequence.
	#
.name	yield, $4
		lw	yield, (RSP_TASK_OFFSET+OS_TASK_OFF_FLAGS)(zero)
		andi	yield, yield, OS_TASK_YIELDED
		bne	yield, zero, RSPYieldRestart
		nop
.unname yield


#ifdef OUTPUT_DRAM
	# reset output pointers
		lw	outp, OS_TASK_OFF_OUTBUFF($1)
		lw	$3, OS_TASK_OFF_OUTBUFF_SZ($1)
		sw	outp, RSP_STATE_DRAM_OUTP(rsp_state)
		sw	$3, RSP_STATE_DRAM_OUT_LENP(rsp_state)

		addi	$4, zero, DPC_CLR_XBUS_DMEM_DMA
		mtc0	$4, CMD_STATUS
 		addi	outp, zero, RSP_OUTPUT_OFFSET

#else
#ifdef OUTPUT_FIFO
.name	bufend, $3
	# reset output pointers
		lw	outp, OS_TASK_OFF_OUTBUFF($1)
		lw	bufend, OS_TASK_OFF_OUTBUFF_SZ($1)
		sw	outp, RSP_STATE_FIFO_BUF_TOP(rsp_state)
		sw	bufend, RSP_STATE_FIFO_BUF_END(rsp_state)

		mfc0	$4, CMD_STATUS
		andi	$4, $4, DPC_STATUS_XBUS_DMEM_DMA
		bne	$4, zero, restart_fifo
		mfc0	$4, CMD_END
		sub	outp, outp, $4
		bgtz	outp, restart_fifo

	mfc0	$5, CMD_CURRENT
	beq	$5, zero, restart_fifo
	nop
	beq	$5, $4, restart_fifo
	

		nop
		j	set_fifo
		ori	bufend, $4, 0

restart_fifo:
		mfc0	$4, CMD_STATUS
		andi	$4, $4, DPC_STATUS_START_VALID
		bne	$4, zero, restart_fifo
		addi	$4, zero, DPC_CLR_XBUS_DMEM_DMA
 ### LOOP TO restart_fifo: UNTIL START_VALID=0
		mtc0	$4, CMD_STATUS
		mtc0	bufend, CMD_START
		mtc0	bufend, CMD_END
set_fifo:
		sw	bufend, RSP_STATE_FIFO_OUTP(rsp_state)
 		addi	outp, zero, RSP_OUTPUT_OFFSET
.unname	bufend

#else /* OUTPUT_XBUS: */
	# reset output pointers
		lw	outp, OS_TASK_OFF_OUTBUFF($1)
		lw	$3, OS_TASK_OFF_OUTBUFF_SZ($1)
		sw	$0, RSP_STATE_DRAM_OUTP(rsp_state)
		sw	$3, RSP_STATE_DRAM_OUT_LENP(rsp_state)

		addi	$4, zero, DPC_SET_XBUS_DMEM_DMA
 		addi	outp, zero, 0x1000	# DP initial conditions
		mtc0	$4, CMD_STATUS
		mtc0	outp, CMD_START
		mtc0	outp, CMD_END

#endif /* OUTPUT_XBUS */
#endif /* OUTPUT_XBUS */


    #####################################################################
    #
    # code overlays:
    #
	# update table to be real DRAM address:
	# (awkward, we pipeline the load delays)
NoRestart:
		lw	$5, OS_TASK_OFF_UCODE($1)	# ucode base pointer

#ifdef FASTLIGHT3D
	# PATCH NEWTON, CLIP, AND LIGHTING
		lw	$2, (OVERLAY_1_OFFSET + OVERLAY_OFFSET)(zero)
		lw	$3, (OVERLAY_2_OFFSET + OVERLAY_OFFSET)(zero)
		lw	$4, (OVERLAY_3_OFFSET + OVERLAY_OFFSET)(zero)
		lw	$6, (OVERLAY_4_OFFSET + OVERLAY_OFFSET)(zero)
		add	$2, $2, $5
		add	$3, $3, $5
		add	$4, $4, $5
		add	$6, $6, $5
		sw	$2, (OVERLAY_1_OFFSET + OVERLAY_OFFSET)(zero)
		sw	$3, (OVERLAY_2_OFFSET + OVERLAY_OFFSET)(zero)
		sw	$4, (OVERLAY_3_OFFSET + OVERLAY_OFFSET)(zero)
		sw	$6, (OVERLAY_4_OFFSET + OVERLAY_OFFSET)(zero)

#else /* FASTLIGHT3D */
	# PATCH NEWTON ONLY
		lw	$2, (OVERLAY_1_OFFSET + OVERLAY_OFFSET)(zero)
		add	$2, $2, $5
		sw	$2, (OVERLAY_1_OFFSET + OVERLAY_OFFSET)(zero)
	
#endif /* FASTLIGHT3D */

	# load newton code:
		jal	loadOverlaySR			# see goverlays.s for
		addi	$30, zero, OVERLAY_NEWTON	# how this works
#ifndef FASTLIGHT3D
		.symbol	NewtonDiv, 0x04001000		# for call-forward
		.symbol	Newtons, 0x04001020		# for call-forward
#endif /* FASTLIGHT3D */
	
    #
    #
    #####################################################################
	
	#
	# get the first display list out of the header and
	# start the DMA of the display list into DMEM.
		jal	LoadDL
		lw	inp, OS_TASK_OFF_DATA($1)
	
	#
	# while DMA is going on, do some initializations:
	#
	# MOST initialization is done at compile time, and loaded
	# in during the PData DMA.
	#
	
	# initialize DRAM stack pointer in RSP state
.name dram_ptr, $2
		lw	dram_ptr, OS_TASK_OFF_STACK($1)	
		sw	dram_ptr, RSP_STATE_DRAM_STACK(rsp_state)
	
	# initialize matrix stacks to empty
		sw	dram_ptr, RSP_STATE_MMTX_STACK_P(rsp_state)
		addi	dram_ptr, dram_ptr, (10*64)
		sw	dram_ptr, RSP_STATE_MMTX_STACK_MAX(rsp_state)

	# save RSP_STATE_YIELD_STORE address from task header
		lw	dram_ptr, -8(zero)
		sw	dram_ptr, RSP_STATEP_YIELD_STORE(zero)
.unname dram_ptr

 #
 #
 #
 # end of initialization section
 #
 ############################################################################
		.end	doInit