cop0.h
2.06 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
*************************************************************************/
/*
* File: cop0.h
* Creator: hsa@sgi.com
* Create Date: Tue Feb 8 15:43:54 PST 1994
*
*/
#ifndef _rsp_cop0_h_
#define _rsp_cop0_h_ 1
typedef enum
{
dma_READ,
dma_WRITE
} dma_commandType_t;
typedef enum
{
dma_BUSY = 0x04,
dma_FULL = 0x08
} dma_flags_t;
/*
* The DMA engine control registers:
* These can be accessed by the host or RSP to initiate block transfers
* from main memory to the instruction or data cache.
*
*/
typedef struct
{
u32 cacheAddr; /* source or destination */
u32 memAddr; /* destination or source */
u32 byteCount; /* bytes per line */
u32 lineCount; /* number of lines */
u32 lineStride; /* offset between lines */
u32 byteCurrent; /* current byte count */
dma_commandType_t dmaType; /* type of action */
} dma_controlReg_t;
#define BYTECOUNT(l) (((l) & 0xfff) | 0x07)
#define LINECOUNT(l) (((l) >> 12) & 0xff)
#define LINESTRIDE(l) (((l) >> 20) & 0xff8)
#define LENGTHREG(s, l, b) (((s)<<20)|((l)<<12)|(b))
/* the free running counter */
extern i32 counter_clock;
extern boolean cop0_Init(char *init_filename, u32 baseaddr);
extern boolean cop0_TestXBUS(void);
extern boolean cop0_Step(void);
extern boolean cop0_DmaBusy(void);
extern boolean cop0_DmaFull(void);
#endif