rsp_regr.h
3.69 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
/************************************************
* Path definitions
************************************************/
`ifdef REALITY_RSP_REGRESSION
`define rsp_path reality.rcp_0.rsp_0
`else
`define rsp_path rspWrap.rsp
`endif
`define NEWVU 1
`define tr rsp_ctrace
`define SRpath `rsp_path.su.sudp.surfilei
`define vu_path `rsp_path.vu
`define VRpath `vu_path.vdpregfile_i
`define vumemb_0 `VRpath.memsl0hi.vubuf.ram_prim
`define vumemb_1 `VRpath.memsl0lo.vubuf.ram_prim
`define vumemb_2 `VRpath.memsl1hi.vubuf.ram_prim
`define vumemb_3 `VRpath.memsl1lo.vubuf.ram_prim
`define vumemb_4 `VRpath.memsl2hi.vubuf.ram_prim
`define vumemb_5 `VRpath.memsl2lo.vubuf.ram_prim
`define vumemb_6 `VRpath.memsl3hi.vubuf.ram_prim
`define vumemb_7 `VRpath.memsl3lo.vubuf.ram_prim
`define vumemb_8 `VRpath.memsl4hi.vubuf.ram_prim
`define vumemb_9 `VRpath.memsl4lo.vubuf.ram_prim
`define vumemb_a `VRpath.memsl5hi.vubuf.ram_prim
`define vumemb_b `VRpath.memsl5lo.vubuf.ram_prim
`define vumemb_c `VRpath.memsl6hi.vubuf.ram_prim
`define vumemb_d `VRpath.memsl6lo.vubuf.ram_prim
`define vumemb_e `VRpath.memsl7hi.vubuf.ram_prim
`define vumemb_f `VRpath.memsl7lo.vubuf.ram_prim
//`define VR0path `vu_path.vusl01.vudp0.vdpregfile_i
//`define VR1path `vu_path.vusl01.vudp1.vdpregfile_i
//`define VR2path `vu_path.vusl23.vudp0.vdpregfile_i
//`define VR3path `vu_path.vusl23.vudp1.vdpregfile_i
//`define VR4path `vu_path.vusl45.vudp0.vdpregfile_i
//`define VR5path `vu_path.vusl45.vudp1.vdpregfile_i
//`define VR6path `vu_path.vusl67.vudp0.vdpregfile_i
//`define VR7path `vu_path.vusl67.vudp1.vdpregfile_i
//`define VDP0path `vu_path.vusl01.vudp0
//`define VDP1path `vu_path.vusl01.vudp1
//`define VDP2path `vu_path.vusl23.vudp0
//`define VDP3path `vu_path.vusl23.vudp1
//`define VDP4path `vu_path.vusl45.vudp0
//`define VDP5path `vu_path.vusl45.vudp1
//`define VDP6path `vu_path.vusl67.vudp0
//`define VDP7path `vu_path.vusl67.vudp1
/*******************************************
* IMEM and DMEM and reg pointers
*******************************************/
`define IMEM `rsp_path.imem.sram.memory
//`define r1 `rsp_path.su.sudp.suRFile_i.mem[1]
//`define r30 `rsp_path.su.sudp.suRFile_i.mem[30]
//`define r31 `rsp_path.su.sudp.suRFile_i.mem[31]
`define r1 `rsp_path.su.sudp.surfilei.mem1.z
`define r30 `rsp_path.su.sudp.surfilei.mem30.z
`define r31 `rsp_path.su.sudp.surfilei.mem31.z
/************************************************
* Key signals
************************************************/
`define CLK `rsp_path.clk
`ifdef RSP_GATE
`define Break `rsp_path.io_mem_dma.broke_reg.q
`else
`define Break `rsp_path.io_mem_dma.mem_dma.broke
`endif
`define Halt `rsp_path.io_mem_dma.halt
`define Reset_l `rsp_path.reset_l
/******************************************
* TimeOut Count values
******************************************/
`ifdef LARGE_TIMEOUT
`define TIMEOUT_CNT 24'h3fffff
`else
`define TIMEOUT_CNT 24'h8000
`endif
`ifdef REALITY_RSP_REGRESSION
`define TIMEOUT_CNT_SS 24'h6000
`else
`define TIMEOUT_CNT_SS 24'h3000
`endif
/*****************************************
* Trace Depth
******************************************/
`define VR_TRACE_DEPTH 256
`ifdef LARGE_TRACE_BUFFER
`define SU_TRACE_DEPTH 100000
`define DM_TRACE_DEPTH 100000
`else
`define SU_TRACE_DEPTH 2048
`define DM_TRACE_DEPTH 2048
`endif
/*********************************************
* rdram core
*********************************************/
`ifdef REALITY_RSP_REGRESSION
// `ifdef RDRAM_1_PRESENT
// `define rdram_0 reality.rdram_1.rdram_near_model_0
// `else
// `define rdram_0 reality.rdram_0.rdram_near_model_0
// `endif
`define rdram_0 reality.rdram_0.rdram_near_model_0
`endif