/*
 * Copyright (C) 1996-1998 by the Board of Trustees
 *    of Leland Stanford Junior University.
 * 
 * This file is part of the SimOS distribution. 
 * See LICENSE file for terms of the license. 
 *
 */

/*****************************************************************
 * memsys.h
 *
 * Interface to a generic memory system. 
 *
 * Author: $author$
 * Date: $date$
 ****************************************************************/

#ifndef MEMSYS_H
#define MEMSYS_H

#include "simtypes.h"
#include "../../cpus/simos/remap.h"

typedef enum {
  NO_MEMSYS=0,
  UMA,
  BUSUMA,
  NUMA,
  PERFECTMEM,
  FLASHLITE,
  CHAL2
} MemsysType;

extern void MemsysInit(void);

typedef int MCMD;

/*
 * Callbacks from the memory system.
 */
extern void CacheFakeInvalidate(int cpuNum, PA paddr, int size);
extern int  CacheInvalidate(int cpuNum, PA paddr, int size, bool writeback,
                            int *wasDirty);
extern int  CacheWriteback(int cpuNum, PA paddr, int size, byte *);
extern int  CacheExtract(int cpuNum, PA paddr, int size, int *writeback,
                         byte *data);
extern void CacheCmdDone(int cpuNum, int transId, int mode,
			 int status, int result, byte *data);
extern void CacheCmdUnstall(int cpuNum, VA vAddr);
extern void CacheFlushDMA(char * paddr, int size);

extern VA   CacheGetVaddr(int cpuNum,int transId);


    /* ************************************************************ *
     * The following fields are set by the different memory systems *
     * ************************************************************ */
typedef struct MemsysVector {
   MemsysType type;
   int NoMemoryDelay;      /* set if stalls are possible */
   unsigned int InMagicCR; /* bitmask for all cpus. Set by annotations
                            * when the CPU is   
                            * in the  magic critical regions, 
                            * where all memory stalls vanish. Used by Snuma
                            */
   
   Result (*MemsysCmd) (int cpunum, MCMD cmd, PA paddr,
                        int transId,  PA replacedPaddr, 
                        int writeback, byte *data);

   void   (*MemsysDumpStats) (void);
   void   (*MemsysDone) (void);
   void   (*MemsysStatus) (void);
   void   (*MemsysDrain) (void);
   
   /* Control remap region.  All references issued by the named cpu with
    * (address & mask == 0) are modified to (addr + node_id).  Node_id is
    * determined by the memory system... for example if there is 32 meg
    * of memory and 2 cpus, the memory system probably has node_id(cpu 1)
    * == 16 meg.
    * In addition to internal setup, whoever implements this function
    * should update the mask and enabled array.  When we dynamically switch
    * (embra/mipsy) this ensures that whatever was setup by the OS
    * is visible to the new mode.
    */
   void   (*MemsysSetRemap)(int cpunum, PA mask);
   void   (*MemsysControlRemap)(int cpunum, int isEnabled);

   /* Determine the node_id for each cpu... eg. the first physical
    * address in that cpu's local memory.  Memory systems without
    * a concept of nodes should return ((cpunum * memsize) / numcpus).
    */
   PA (*MemsysGetNodeAddress)(int cpunum);
} MemsysVector;

extern MemsysVector memsysVec;

/*
 * Commands for the memory system.
 */
#define MEMSYS_GET      0x1   /* Get a cache line */
#define MEMSYS_GETX     0x2   /* Get a cache line exclusive */
#define MEMSYS_UPGRADE  0x3   /* Upgrade a cache line */
#define MEMSYS_SYNC     0x4   /* Sync the processor caches wrt memory */
#define MEMSYS_UNCWRITE 0x5  /* uncached op */
#define MEMSYS_UNCREAD  0x6   /* uncached read */
#define MEMSYS_UNCWRITE_ACCELERATED 0x7  /* uncached accelerated op */
#define MEMSYS_WRITEBACK	  0x8	/* used by BusUma for wb buffers */
#define MEMSYS_SHARING_WRITEBACK  0x9	/* used by BusUma  for sharing wbs */
#define MEMSYS_REPLACEMENT_HINT	0xa	/* used for replacement hints in NUMA */
#define MEMSYS_CMDMASK  0xf

                             /* Flavors for the commands */
#define MEMSYS_LLFLAVOR  0x010
#define MEMSYS_SCFLAVOR  0x020
#define MEMSYS_IFFLAVOR  0x040 
#define MEMSYS_DMAFLAVOR 0x080  
#define MEMSYS_PREFETCH  0x100

/*
 * Reply modes 
 */
#define MEMSYS_SHARED    0x1
#define MEMSYS_EXCLUSIVE 0x2
#define MEMSYS_UNCACHED 0x3

/*
 * Status reponse passed to CacheCmdDone 
 */

#define MEMSYS_STATUS_SUCCESS 0x0
#define MEMSYS_STATUS_NAK     0x1
#define MEMSYS_STATUS_ERROR   0x2

#define MEMSYS_NOADDR  ((PA)-1)

/*
 * Information about what happened to the request, for stats gathering
 */

#define MEMSYS_RESULT_MEMORY  (1<<0)   /* data fetched from memory */
#define MEMSYS_RESULT_CACHE   (1<<1)   /* data fetched from another cache */

#define MEMSYS_RESULT_NOTRANSITION (1<<2)  /* no other cache transitions occurred */
#define MEMSYS_RESULT_DOWNGRADE    (1<<3)  /* an exclusive copy was downgraded */
#define MEMSYS_RESULT_INVALIDATE   (1<<4)  /* at least one copy was invalidated */

#define MEMSYS_RESULT_REMOTE_HOME   (1<<5)  /* Home of miss was remote */

/*
 * Maximum number of outstanding request the memmory system should support for
 * each CPU.
 */

#define MEMSYS_MAX_OUTSTANDING 8

/* 
 * magic critical region. Dynamically switch to a NoMemoryDelay memory system
 * for processors in a particular critical region
 */

#define IN_MAGIC_SECTION(_cpu) (memsysVec.InMagicCR & (1<<_cpu))
#define ENTER_MAGIC_SECTION(_cpu) (memsysVec.InMagicCR |= (1<<_cpu))
#define EXIT_MAGIC_SECTION(_cpu) (memsysVec.InMagicCR &= ~(1<<_cpu))

enum Counter_Type {
   /* instruction fetch, LLs, DMA gets, all other data fetches */
   COUNT_IGETS, COUNT_LLGETS, COUNT_DMAGETS, COUNT_DGETS, 
   /* DMA getxs, other getxs, sc upgrades, other upgrades */
   COUNT_DMAGETXS, COUNT_GETXS, COUNT_SCUPGRADES, COUNT_UPGRADES,
   /* writebacks, replacement hints*/
   COUNT_WRITEBACKS, COUNT_REPLHINTS,
   /* Uncached writes, uncached accelerated writes, uncached reads */
   COUNT_UNCACHEDWRITES, COUNT_UNCACHEDACCWRITES, COUNT_UNCACHEDREADS,

   /* Total invals or downgrades sent */  
   COUNT_INVALORDNGRADESENT,
   /* NAKs sent -- upgrades, requestTable overflow */
   COUNT_NAKS,
   /* Cache line dirty */
   COUNT_REMOTEDIRTY,
   /* Exclusive request on a shared line */
   COUNT_EXCLUSIVEONSHARED,
   /* Number of memory accesses */
   COUNT_MEMORYACCESS,
   /* number of counter types -- to allocate array */
   COUNT_TOTAL};

#endif /* MEMSYS_H */