rcp.ss
2.31 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
/* read the edif sources */
read -f edif rcp.edf_p
read -f edif io_ri.edf
read -f edif if_logic.edf
read -f edif vclk_driver.edf
read -f edif syn_clk_buf.edf
read -f edif ../tst/syn/tst.edf
read -f edif ../rdp/syn/cs_ew_cv.edf
read -f edif ../rdp/syn/bl_logic.edf
read -f edif ../rdp/syn/cc_logic.edf
read -f edif ../rdp/syn/tc_logic.edf
read -f edif ../rdp/syn/tm_tf.edf
read -f edif ../rdp/syn/memspan.edf
read -f edif ../rsp/syn/data_unit.edf
read -f edif ../rsp/syn/iu.edf
read -f edif ../pi/syn/pi.edf
read -f edif ../vi/syn/vi.edf
read -f edif ../vu/syn/vusl.edf
read -f edif ../vu/syn/div.edf
/* dummy pads */
read -f verilog ../src/dummy_pads.v
current_design = rcp
create_cell dummy_pads dummy_pads
ungroup dummy_pads
link
all_connected reset_l_0
disconnect_net reset_l_0 -all
connect_net reset_l_0 tst_0/tst_reset_l_0
connect_net reset_l_0 rsp_0/iu/reset_l
connect_net reset_l_0 io_ri/reset_l_0
create_net reset_l_1
connect_net reset_l_1 tst_0/tst_reset_l_1
connect_net reset_l_1 rdp_0/tc_logic/reset_l
create_net reset_l_2
connect_net reset_l_2 tst_0/tst_reset_l_2
connect_net reset_l_2 rsp_0/vu/vusl01/reset_l
connect_net reset_l_2 rsp_0/vu/vusl23/reset_l
connect_net reset_l_2 rsp_0/vu/vusl45/reset_l
connect_net reset_l_2 rsp_0/vu/vusl67/reset_l
create_net reset_l_3
connect_net reset_l_3 tst_0/tst_reset_l_3
connect_net reset_l_3 if_logic/reset_l_0
connect_net reset_l_3 pi_0/reset_l
connect_net reset_l_3 rsp_0/vu/div1/Reset_l
create_net reset_l_4
connect_net reset_l_4 tst_0/tst_reset_l_4
connect_net reset_l_4 rdp_0/cs_ew_cv/reset_l
connect_net reset_l_4 rdp_0/bl_logic/reset_l
create_net reset_l_5
connect_net reset_l_5 tst_0/tst_reset_l_5
connect_net reset_l_5 rsp_0/data_unit/reset_l
create_net reset_l_6
connect_net reset_l_6 tst_0/tst_reset_l_6
connect_net reset_l_6 rdp_0/tm_tf/reset_l
create_net reset_l_7
connect_net reset_l_7 tst_0/tst_reset_l_7
connect_net reset_l_7 rdp_0/memspan/reset_l
create_net reset_l_8
connect_net reset_l_8 tst_0/tst_reset_l_8
connect_net reset_l_8 rdp_0/cc_logic/reset_l
create_net reset_l_9
connect_net reset_l_9 tst_0/tst_reset_l_9
connect_net reset_l_9 vi_0/reset_l
connect_net reset_l_9 vclk_driver_0/reset_l
check_design > rcp_final.lint
report_reference
/* Write out partitioned edif netlist for layout */
write -f edif -o rcp.edf rcp
write -f verilog -o rcp.vsyn -hier rcp
quit