ri_ba.ss
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/*****************************************************************************/
/* custom variables */
/*****************************************************************************/
module = "ri"
/*****************************************************************************/
/* set the path and read */
/*****************************************************************************/
search_path = search_path + "../../../syn" + ".."
bus_naming_style = "%s(%d)"
bus_extraction_style = "%s(%d..%d)"
bus_range_separator_style = ".."
bus_dimension_separator_style = ")("
bus_inference_style ="%s(%d)"
bus_minus_style ="-%d"
bus_inference_descending_sort = "true"
read -f edif module + ".edf"
/*****************************************************************************/
/* manual netlist changes */
/*****************************************************************************/
current_design = module
link
check_design > module + ".lint"
/*****************************************************************************/
/* constraints */
/*****************************************************************************/
include module + ".tmg"
set_wire_load wire_load -mode top
/*****************************************************************************/
/* reports */
/*****************************************************************************/
report_constraint -all_violators
reset_design
include module + ".tmg"
include module + ".NetParasitics"
report_constraint -all_violators
quit