module = cc_logic

search_path = search_path + "../src" + "../../inc" + \
   "../../../lib/verilog/user" + "../../syn"

/* read the compiled rdp module netlists */

read -f edif cc_logic.edf_p
read -f edif ../../at/syn/at.edf
read -f edif ../../cc/syn/cc.edf
read -f edif ../../ep/syn/ep.edf
read -f edif ../../st/syn/st.edf

current_design = cc_logic

ungroup -all -flatten 

link 

check_design > cc_logic.lint

/* standard reports & netlist */

include "report.dc"

write -f edif -o cc_logic.edf -hier cc_logic

quit