////////////////////////////////////////////////////////////////////////
//
// Project Reality
//
// module:	sudp_add32
// description:	32 bit carry-propagating adder for use in replacing 
//		datapath adder with standard cells.  Requires carry 
//		in to lsb, carry out from msb, and carry in to msb.
//		Conditional sum adder.
//
// designer:	Phil Gossett
// date:	4/9/95
//
////////////////////////////////////////////////////////////////////////

// $Id: sudp_add32.v,v 1.1.1.1 2002/05/17 06:14:58 blythe Exp $

module sudp_add32 (a, b, ci, s, co, co30) ;

input [31:0] a;
input [31:0] b;
input ci;

output [31:0] s;
output co;	// carry out for bit 31
output co30;	// carry out for bit 30 used to generate overflow


wire [31:0] s0;	// sum out assuming carry in 0
wire [31:0] s1;	// sum out assuming carry in 1
wire [31:0] c0;	// carry out assuming carry in 0
wire [31:0] c1;	// carry out assuming carry in 1


// conditional cells:

xo02d2 s00  (.a1(a[0]), .a2(b[0]),  .z(s0[0]));
xn02d2 s10  (.a1(a[0]), .a2(b[0]), .zn(s1[0]));
an02d2 c00  (.a1(a[0]), .a2(b[0]),  .z(c0[0]));
or02d2 c10  (.a1(a[0]), .a2(b[0]),  .z(c1[0]));

xo02d2 s01  (.a1(a[1]), .a2(b[1]),  .z(s0[1]));
xn02d2 s11  (.a1(a[1]), .a2(b[1]), .zn(s1[1]));
an02d2 c01  (.a1(a[1]), .a2(b[1]),  .z(c0[1]));
or02d2 c11  (.a1(a[1]), .a2(b[1]),  .z(c1[1]));

xo02d2 s02  (.a1(a[2]), .a2(b[2]),  .z(s0[2]));
xn02d2 s12  (.a1(a[2]), .a2(b[2]), .zn(s1[2]));
an02d2 c02  (.a1(a[2]), .a2(b[2]),  .z(c0[2]));
or02d2 c12  (.a1(a[2]), .a2(b[2]),  .z(c1[2]));

xo02d2 s03  (.a1(a[3]), .a2(b[3]),  .z(s0[3]));
xn02d2 s13  (.a1(a[3]), .a2(b[3]), .zn(s1[3]));
an02d2 c03  (.a1(a[3]), .a2(b[3]),  .z(c0[3]));
or02d2 c13  (.a1(a[3]), .a2(b[3]),  .z(c1[3]));

xo02d2 s04  (.a1(a[4]), .a2(b[4]),  .z(s0[4]));
xn02d2 s14  (.a1(a[4]), .a2(b[4]), .zn(s1[4]));
an02d2 c04  (.a1(a[4]), .a2(b[4]),  .z(c0[4]));
or02d2 c14  (.a1(a[4]), .a2(b[4]),  .z(c1[4]));

xo02d2 s05  (.a1(a[5]), .a2(b[5]),  .z(s0[5]));
xn02d2 s15  (.a1(a[5]), .a2(b[5]), .zn(s1[5]));
an02d2 c05  (.a1(a[5]), .a2(b[5]),  .z(c0[5]));
or02d2 c15  (.a1(a[5]), .a2(b[5]),  .z(c1[5]));

xo02d2 s06  (.a1(a[6]), .a2(b[6]),  .z(s0[6]));
xn02d2 s16  (.a1(a[6]), .a2(b[6]), .zn(s1[6]));
an02d2 c06  (.a1(a[6]), .a2(b[6]),  .z(c0[6]));
or02d2 c16  (.a1(a[6]), .a2(b[6]),  .z(c1[6]));

xo02d2 s07  (.a1(a[7]), .a2(b[7]),  .z(s0[7]));
xn02d2 s17  (.a1(a[7]), .a2(b[7]), .zn(s1[7]));
an02d2 c07  (.a1(a[7]), .a2(b[7]),  .z(c0[7]));
or02d2 c17  (.a1(a[7]), .a2(b[7]),  .z(c1[7]));

xo02d2 s08  (.a1(a[8]), .a2(b[8]),  .z(s0[8]));
xn02d2 s18  (.a1(a[8]), .a2(b[8]), .zn(s1[8]));
an02d2 c08  (.a1(a[8]), .a2(b[8]),  .z(c0[8]));
or02d2 c18  (.a1(a[8]), .a2(b[8]),  .z(c1[8]));

xo02d2 s09  (.a1(a[9]), .a2(b[9]),  .z(s0[9]));
xn02d2 s19  (.a1(a[9]), .a2(b[9]), .zn(s1[9]));
an02d2 c09  (.a1(a[9]), .a2(b[9]),  .z(c0[9]));
or02d2 c19  (.a1(a[9]), .a2(b[9]),  .z(c1[9]));

xo02d2 s010 (.a1(a[10]), .a2(b[10]),  .z(s0[10]));
xn02d2 s110 (.a1(a[10]), .a2(b[10]), .zn(s1[10]));
an02d2 c010 (.a1(a[10]), .a2(b[10]),  .z(c0[10]));
or02d2 c110 (.a1(a[10]), .a2(b[10]),  .z(c1[10]));

xo02d2 s011 (.a1(a[11]), .a2(b[11]),  .z(s0[11]));
xn02d2 s111 (.a1(a[11]), .a2(b[11]), .zn(s1[11]));
an02d2 c011 (.a1(a[11]), .a2(b[11]),  .z(c0[11]));
or02d2 c111 (.a1(a[11]), .a2(b[11]),  .z(c1[11]));

xo02d2 s012 (.a1(a[12]), .a2(b[12]),  .z(s0[12]));
xn02d2 s112 (.a1(a[12]), .a2(b[12]), .zn(s1[12]));
an02d2 c012 (.a1(a[12]), .a2(b[12]),  .z(c0[12]));
or02d2 c112 (.a1(a[12]), .a2(b[12]),  .z(c1[12]));

xo02d2 s013 (.a1(a[13]), .a2(b[13]),  .z(s0[13]));
xn02d2 s113 (.a1(a[13]), .a2(b[13]), .zn(s1[13]));
an02d2 c013 (.a1(a[13]), .a2(b[13]),  .z(c0[13]));
or02d2 c113 (.a1(a[13]), .a2(b[13]),  .z(c1[13]));

xo02d2 s014 (.a1(a[14]), .a2(b[14]),  .z(s0[14]));
xn02d2 s114 (.a1(a[14]), .a2(b[14]), .zn(s1[14]));
an02d2 c014 (.a1(a[14]), .a2(b[14]),  .z(c0[14]));
or02d2 c114 (.a1(a[14]), .a2(b[14]),  .z(c1[14]));

xo02d2 s015 (.a1(a[15]), .a2(b[15]),  .z(s0[15]));
xn02d2 s115 (.a1(a[15]), .a2(b[15]), .zn(s1[15]));
an02d2 c015 (.a1(a[15]), .a2(b[15]),  .z(c0[15]));
or02d2 c115 (.a1(a[15]), .a2(b[15]),  .z(c1[15]));

xo02d2 s016 (.a1(a[16]), .a2(b[16]),  .z(s0[16]));
xn02d2 s116 (.a1(a[16]), .a2(b[16]), .zn(s1[16]));
an02d2 c016 (.a1(a[16]), .a2(b[16]),  .z(c0[16]));
or02d2 c116 (.a1(a[16]), .a2(b[16]),  .z(c1[16]));

xo02d2 s017 (.a1(a[17]), .a2(b[17]),  .z(s0[17]));
xn02d2 s117 (.a1(a[17]), .a2(b[17]), .zn(s1[17]));
an02d2 c017 (.a1(a[17]), .a2(b[17]),  .z(c0[17]));
or02d2 c117 (.a1(a[17]), .a2(b[17]),  .z(c1[17]));

xo02d2 s018 (.a1(a[18]), .a2(b[18]),  .z(s0[18]));
xn02d2 s118 (.a1(a[18]), .a2(b[18]), .zn(s1[18]));
an02d2 c018 (.a1(a[18]), .a2(b[18]),  .z(c0[18]));
or02d2 c118 (.a1(a[18]), .a2(b[18]),  .z(c1[18]));

xo02d2 s019 (.a1(a[19]), .a2(b[19]),  .z(s0[19]));
xn02d2 s119 (.a1(a[19]), .a2(b[19]), .zn(s1[19]));
an02d2 c019 (.a1(a[19]), .a2(b[19]),  .z(c0[19]));
or02d2 c119 (.a1(a[19]), .a2(b[19]),  .z(c1[19]));

xo02d2 s020 (.a1(a[20]), .a2(b[20]),  .z(s0[20]));
xn02d2 s120 (.a1(a[20]), .a2(b[20]), .zn(s1[20]));
an02d2 c020 (.a1(a[20]), .a2(b[20]),  .z(c0[20]));
or02d2 c120 (.a1(a[20]), .a2(b[20]),  .z(c1[20]));

xo02d2 s021 (.a1(a[21]), .a2(b[21]),  .z(s0[21]));
xn02d2 s121 (.a1(a[21]), .a2(b[21]), .zn(s1[21]));
an02d2 c021 (.a1(a[21]), .a2(b[21]),  .z(c0[21]));
or02d2 c121 (.a1(a[21]), .a2(b[21]),  .z(c1[21]));

xo02d2 s022 (.a1(a[22]), .a2(b[22]),  .z(s0[22]));
xn02d2 s122 (.a1(a[22]), .a2(b[22]), .zn(s1[22]));
an02d2 c022 (.a1(a[22]), .a2(b[22]),  .z(c0[22]));
or02d2 c122 (.a1(a[22]), .a2(b[22]),  .z(c1[22]));

xo02d2 s023 (.a1(a[23]), .a2(b[23]),  .z(s0[23]));
xn02d2 s123 (.a1(a[23]), .a2(b[23]), .zn(s1[23]));
an02d2 c023 (.a1(a[23]), .a2(b[23]),  .z(c0[23]));
or02d2 c123 (.a1(a[23]), .a2(b[23]),  .z(c1[23]));

xo02d2 s024 (.a1(a[24]), .a2(b[24]),  .z(s0[24]));
xn02d2 s124 (.a1(a[24]), .a2(b[24]), .zn(s1[24]));
an02d2 c024 (.a1(a[24]), .a2(b[24]),  .z(c0[24]));
or02d2 c124 (.a1(a[24]), .a2(b[24]),  .z(c1[24]));

xo02d2 s025 (.a1(a[25]), .a2(b[25]),  .z(s0[25]));
xn02d2 s125 (.a1(a[25]), .a2(b[25]), .zn(s1[25]));
an02d2 c025 (.a1(a[25]), .a2(b[25]),  .z(c0[25]));
or02d2 c125 (.a1(a[25]), .a2(b[25]),  .z(c1[25]));

xo02d2 s026  (.a1(a[26]), .a2(b[26]),  .z(s0[26]));
xn02d2 s126  (.a1(a[26]), .a2(b[26]), .zn(s1[26]));
an02d2 c026  (.a1(a[26]), .a2(b[26]),  .z(c0[26]));
or02d2 c126  (.a1(a[26]), .a2(b[26]),  .z(c1[26]));

xo02d2 s027  (.a1(a[27]), .a2(b[27]),  .z(s0[27]));
xn02d2 s127  (.a1(a[27]), .a2(b[27]), .zn(s1[27]));
an02d2 c027  (.a1(a[27]), .a2(b[27]),  .z(c0[27]));
or02d2 c127  (.a1(a[27]), .a2(b[27]),  .z(c1[27]));

xo02d2 s028  (.a1(a[28]), .a2(b[28]),  .z(s0[28]));
xn02d2 s128  (.a1(a[28]), .a2(b[28]), .zn(s1[28]));
an02d2 c028  (.a1(a[28]), .a2(b[28]),  .z(c0[28]));
or02d2 c128  (.a1(a[28]), .a2(b[28]),  .z(c1[28]));

xo02d2 s029  (.a1(a[29]), .a2(b[29]),  .z(s0[29]));
xn02d2 s129  (.a1(a[29]), .a2(b[29]), .zn(s1[29]));
an02d2 c029  (.a1(a[29]), .a2(b[29]),  .z(c0[29]));
or02d2 c129  (.a1(a[29]), .a2(b[29]),  .z(c1[29]));

xo02d2 s030  (.a1(a[30]), .a2(b[30]),  .z(s0[30]));
xn02d2 s130  (.a1(a[30]), .a2(b[30]), .zn(s1[30]));
an02d2 c030  (.a1(a[30]), .a2(b[30]),  .z(c0[30]));
or02d2 c130  (.a1(a[30]), .a2(b[30]),  .z(c1[30]));

xo02d2 s031  (.a1(a[31]), .a2(b[31]),  .z(s0[31]));
xn02d2 s131  (.a1(a[31]), .a2(b[31]), .zn(s1[31]));
an02d2 c031  (.a1(a[31]), .a2(b[31]),  .z(c0[31]));
or02d2 c131  (.a1(a[31]), .a2(b[31]),  .z(c1[31]));


// first rank of muxes (all muxes should be high performance):

wire m1c0b0;	// carry out from bit 0

wire m1s0b2;	// sum bit 2 assuming carry out bit 1 is 0
wire m1s1b2;	// sum bit 2 assuming carry out bit 1 is 1
wire m1c0b2;	// carry in to bit 3 assuming carry out bit 1 is 0
wire m1c1b2;	// carry in to bit 3 assuming carry out bit 1 is 1

wire m1s0b4;	// sum bit 4 assuming carry out bit 1 is 0
wire m1s1b4;	// sum bit 4 assuming carry out bit 1 is 1
wire m1c0b4;	// carry in to bit 5 assuming carry out bit 1 is 0
wire m1c1b4;	// carry in to bit 5 assuming carry out bit 1 is 1

wire m1s0b6;	// sum bit 6 assuming carry out bit 1 is 0
wire m1s1b6;	// sum bit 6 assuming carry out bit 1 is 1
wire m1c0b6;	// carry in to bit 7 assuming carry out bit 1 is 0
wire m1c1b6;	// carry in to bit 7 assuming carry out bit 1 is 1

wire m1s0b8;	// sum bit 8 assuming carry out bit 1 is 0
wire m1s1b8;	// sum bit 8 assuming carry out bit 1 is 1
wire m1c0b8;	// carry in to bit 9 assuming carry out bit 1 is 0
wire m1c1b8;	// carry in to bit 9 assuming carry out bit 1 is 1

wire m1s0b10;	// sum bit 10 assuming carry out bit 1 is 0
wire m1s1b10;	// sum bit 10 assuming carry out bit 1 is 1
wire m1c0b10;	// carry in to bit 11 assuming carry out bit 1 is 0
wire m1c1b10;	// carry in to bit 11 assuming carry out bit 1 is 1

wire m1s0b12;	// sum bit 12 assuming carry out bit 1 is 0
wire m1s1b12;	// sum bit 12 assuming carry out bit 1 is 1
wire m1c0b12;	// carry in to bit 13 assuming carry out bit 1 is 0
wire m1c1b12;	// carry in to bit 13 assuming carry out bit 1 is 1

wire m1s0b14;	// sum bit 14 assuming carry out bit 1 is 0
wire m1s1b14;	// sum bit 14 assuming carry out bit 1 is 1
wire m1c0b14;	// carry in to bit 15 assuming carry out bit 1 is 0
wire m1c1b14;	// carry in to bit 15 assuming carry out bit 1 is 1

wire m1s0b16;	// sum bit 16 assuming carry out bit 1 is 0
wire m1s1b16;	// sum bit 16 assuming carry out bit 1 is 1
wire m1c0b16;	// carry in to bit 17 assuming carry out bit 1 is 0
wire m1c1b16;	// carry in to bit 17 assuming carry out bit 1 is 1

wire m1s0b18;	// sum bit 18 assuming carry out bit 1 is 0
wire m1s1b18;	// sum bit 18 assuming carry out bit 1 is 1
wire m1c0b18;	// carry in to bit 19 assuming carry out bit 1 is 0
wire m1c1b18;	// carry in to bit 19 assuming carry out bit 1 is 1

wire m1s0b20;	// sum bit 20 assuming carry out bit 1 is 0
wire m1s1b20;	// sum bit 20 assuming carry out bit 1 is 1
wire m1c0b20;	// carry in to bit 21 assuming carry out bit 1 is 0
wire m1c1b20;	// carry in to bit 21 assuming carry out bit 1 is 1

wire m1s0b22;	// sum bit 22 assuming carry out bit 1 is 0
wire m1s1b22;	// sum bit 22 assuming carry out bit 1 is 1
wire m1c0b22;	// carry in to bit 23 assuming carry out bit 1 is 0
wire m1c1b22;	// carry in to bit 23 assuming carry out bit 1 is 1

wire m1s0b24;	// sum bit 24 assuming carry out bit 1 is 0
wire m1s1b24;	// sum bit 24 assuming carry out bit 1 is 1
wire m1c0b24;	// carry in to bit 24 assuming carry out bit 1 is 0
wire m1c1b24;	// carry in to bit 24 assuming carry out bit 1 is 1

wire m1s0b26;	// sum bit 26 assuming carry out bit 1 is 0
wire m1s1b26;	// sum bit 26 assuming carry out bit 1 is 1
wire m1c0b26;	// carry in to bit 27 assuming carry out bit 1 is 0
wire m1c1b26;	// carry in to bit 27 assuming carry out bit 1 is 1

wire m1s0b28;	// sum bit 28 assuming carry out bit 1 is 0
wire m1s1b28;	// sum bit 28 assuming carry out bit 1 is 1
wire m1c0b28;	// carry in to bit 29 assuming carry out bit 1 is 0
wire m1c1b28;	// carry in to bit 29 assuming carry out bit 1 is 1

wire m1s0b30;	// sum bit 30 assuming carry out bit 1 is 0
wire m1s1b30;	// sum bit 30 assuming carry out bit 1 is 1
wire m1c0b30;	// carry in to bit 31 assuming carry out bit 1 is 0
wire m1c1b30;	// carry in to bit 31 assuming carry out bit 1 is 1


mx21d1h mx1s0b0  (.s(ci), .i0(s0[0]), .i1(s1[0]), .z(s[0]));
mx21d1h mx1c0b0  (.s(ci), .i0(c0[0]), .i1(c1[0]), .z(m1c0b0));

mx21d1h mx1s0b2  (.s(c0[1]), .i0(s0[2]), .i1(s1[2]), .z(m1s0b2));
mx21d1h mx1s1b2  (.s(c1[1]), .i0(s0[2]), .i1(s1[2]), .z(m1s1b2));
mx21d1h mx1c0b2  (.s(c0[1]), .i0(c0[2]), .i1(c1[2]), .z(m1c0b2));
mx21d1h mx1c1b2  (.s(c1[1]), .i0(c0[2]), .i1(c1[2]), .z(m1c1b2));

mx21d1h mx1s0b4  (.s(c0[3]), .i0(s0[4]), .i1(s1[4]), .z(m1s0b4));
mx21d1h mx1s1b4  (.s(c1[3]), .i0(s0[4]), .i1(s1[4]), .z(m1s1b4));
mx21d1h mx1c0b4  (.s(c0[3]), .i0(c0[4]), .i1(c1[4]), .z(m1c0b4));
mx21d1h mx1c1b4  (.s(c1[3]), .i0(c0[4]), .i1(c1[4]), .z(m1c1b4));

mx21d1h mx1s0b6  (.s(c0[5]), .i0(s0[6]), .i1(s1[6]), .z(m1s0b6));
mx21d1h mx1s1b6  (.s(c1[5]), .i0(s0[6]), .i1(s1[6]), .z(m1s1b6));
mx21d1h mx1c0b6  (.s(c0[5]), .i0(c0[6]), .i1(c1[6]), .z(m1c0b6));
mx21d1h mx1c1b6  (.s(c1[5]), .i0(c0[6]), .i1(c1[6]), .z(m1c1b6));

mx21d1h mx1s0b8  (.s(c0[7]), .i0(s0[8]), .i1(s1[8]), .z(m1s0b8));
mx21d1h mx1s1b8  (.s(c1[7]), .i0(s0[8]), .i1(s1[8]), .z(m1s1b8));
mx21d1h mx1c0b8  (.s(c0[7]), .i0(c0[8]), .i1(c1[8]), .z(m1c0b8));
mx21d1h mx1c1b8  (.s(c1[7]), .i0(c0[8]), .i1(c1[8]), .z(m1c1b8));

mx21d1h mx1s0b10 (.s(c0[9]), .i0(s0[10]), .i1(s1[10]), .z(m1s0b10));
mx21d1h mx1s1b10 (.s(c1[9]), .i0(s0[10]), .i1(s1[10]), .z(m1s1b10));
mx21d1h mx1c0b10 (.s(c0[9]), .i0(c0[10]), .i1(c1[10]), .z(m1c0b10));
mx21d1h mx1c1b10 (.s(c1[9]), .i0(c0[10]), .i1(c1[10]), .z(m1c1b10));

mx21d1h mx1s0b12 (.s(c0[11]), .i0(s0[12]), .i1(s1[12]), .z(m1s0b12));
mx21d1h mx1s1b12 (.s(c1[11]), .i0(s0[12]), .i1(s1[12]), .z(m1s1b12));
mx21d1h mx1c0b12 (.s(c0[11]), .i0(c0[12]), .i1(c1[12]), .z(m1c0b12));
mx21d1h mx1c1b12 (.s(c1[11]), .i0(c0[12]), .i1(c1[12]), .z(m1c1b12));

mx21d1h mx1s0b14 (.s(c0[13]), .i0(s0[14]), .i1(s1[14]), .z(m1s0b14));
mx21d1h mx1s1b14 (.s(c1[13]), .i0(s0[14]), .i1(s1[14]), .z(m1s1b14));
mx21d1h mx1c0b14 (.s(c0[13]), .i0(c0[14]), .i1(c1[14]), .z(m1c0b14));
mx21d1h mx1c1b14 (.s(c1[13]), .i0(c0[14]), .i1(c1[14]), .z(m1c1b14));

mx21d1h mx1s0b16 (.s(c0[15]), .i0(s0[16]), .i1(s1[16]), .z(m1s0b16));
mx21d1h mx1s1b16 (.s(c1[15]), .i0(s0[16]), .i1(s1[16]), .z(m1s1b16));
mx21d1h mx1c0b16 (.s(c0[15]), .i0(c0[16]), .i1(c1[16]), .z(m1c0b16));
mx21d1h mx1c1b16 (.s(c1[15]), .i0(c0[16]), .i1(c1[16]), .z(m1c1b16));

mx21d1h mx1s0b18 (.s(c0[17]), .i0(s0[18]), .i1(s1[18]), .z(m1s0b18));
mx21d1h mx1s1b18 (.s(c1[17]), .i0(s0[18]), .i1(s1[18]), .z(m1s1b18));
mx21d1h mx1c0b18 (.s(c0[17]), .i0(c0[18]), .i1(c1[18]), .z(m1c0b18));
mx21d1h mx1c1b18 (.s(c1[17]), .i0(c0[18]), .i1(c1[18]), .z(m1c1b18));

mx21d1h mx1s0b20 (.s(c0[19]), .i0(s0[20]), .i1(s1[20]), .z(m1s0b20));
mx21d1h mx1s1b20 (.s(c1[19]), .i0(s0[20]), .i1(s1[20]), .z(m1s1b20));
mx21d1h mx1c0b20 (.s(c0[19]), .i0(c0[20]), .i1(c1[20]), .z(m1c0b20));
mx21d1h mx1c1b20 (.s(c1[19]), .i0(c0[20]), .i1(c1[20]), .z(m1c1b20));

mx21d1h mx1s0b22 (.s(c0[21]), .i0(s0[22]), .i1(s1[22]), .z(m1s0b22));
mx21d1h mx1s1b22 (.s(c1[21]), .i0(s0[22]), .i1(s1[22]), .z(m1s1b22));
mx21d1h mx1c0b22 (.s(c0[21]), .i0(c0[22]), .i1(c1[22]), .z(m1c0b22));
mx21d1h mx1c1b22 (.s(c1[21]), .i0(c0[22]), .i1(c1[22]), .z(m1c1b22));

mx21d1h mx1s0b24 (.s(c0[23]), .i0(s0[24]), .i1(s1[24]), .z(m1s0b24));
mx21d1h mx1s1b24 (.s(c1[23]), .i0(s0[24]), .i1(s1[24]), .z(m1s1b24));
mx21d1h mx1c0b24 (.s(c0[23]), .i0(c0[24]), .i1(c1[24]), .z(m1c0b24));
mx21d1h mx1c1b24 (.s(c1[23]), .i0(c0[24]), .i1(c1[24]), .z(m1c1b24));

mx21d1h mx1s0b26 (.s(c0[25]), .i0(s0[26]), .i1(s1[26]), .z(m1s0b26));
mx21d1h mx1s1b26 (.s(c1[25]), .i0(s0[26]), .i1(s1[26]), .z(m1s1b26));
mx21d1h mx1c0b26 (.s(c0[25]), .i0(c0[26]), .i1(c1[26]), .z(m1c0b26));
mx21d1h mx1c1b26 (.s(c1[25]), .i0(c0[26]), .i1(c1[26]), .z(m1c1b26));

mx21d1h mx1s0b28 (.s(c0[27]), .i0(s0[28]), .i1(s1[28]), .z(m1s0b28));
mx21d1h mx1s1b28 (.s(c1[27]), .i0(s0[28]), .i1(s1[28]), .z(m1s1b28));
mx21d1h mx1c0b28 (.s(c0[27]), .i0(c0[28]), .i1(c1[28]), .z(m1c0b28));
mx21d1h mx1c1b28 (.s(c1[27]), .i0(c0[28]), .i1(c1[28]), .z(m1c1b28));

mx21d1h mx1s0b30 (.s(c0[29]), .i0(s0[30]), .i1(s1[30]), .z(m1s0b30));
mx21d1h mx1s1b30 (.s(c1[29]), .i0(s0[30]), .i1(s1[30]), .z(m1s1b30));
mx21d1h mx1c0b30 (.s(c0[29]), .i0(c0[30]), .i1(c1[30]), .z(m1c0b30));
mx21d1h mx1c1b30 (.s(c1[29]), .i0(c0[30]), .i1(c1[30]), .z(m1c1b30));

// second rank of muxes:

wire m2c0b2;	// carry out from bit 2

wire m2s0b5;	// sum bit 5 assuming carry out bit 4 is 0
wire m2s1b5;	// sum bit 5 assuming carry out bit 4 is 1
wire m2s0b6;	// sum bit 6 assuming carry out bit 4 is 0
wire m2s1b6;	// sum bit 6 assuming carry out bit 4 is 1
wire m2c0b6;	// carry in to bit 6 assuming carry out bit 4 is 0
wire m2c1b6;	// carry in to bit 6 assuming carry out bit 4 is 1

wire m2s0b9;	// sum bit 9 assuming carry out bit 8 is 0
wire m2s1b9;	// sum bit 9 assuming carry out bit 8 is 1
wire m2s0b10;	// sum bit 10 assuming carry out bit 8 is 0
wire m2s1b10;	// sum bit 10 assuming carry out bit 8 is 1
wire m2c0b10;	// carry in to bit 10 assuming carry out bit 8 is 0
wire m2c1b10;	// carry in to bit 10 assuming carry out bit 8 is 1

wire m2s0b13;	// sum bit 13 assuming carry out bit 12 is 0
wire m2s1b13;	// sum bit 13 assuming carry out bit 12 is 1
wire m2s0b14;	// sum bit 14 assuming carry out bit 12 is 0
wire m2s1b14;	// sum bit 14 assuming carry out bit 12 is 1
wire m2c0b14;	// carry in to bit 14 assuming carry out bit 12 is 0
wire m2c1b14;	// carry in to bit 14 assuming carry out bit 12 is 1

wire m2s0b17;	// sum bit 17 assuming carry out bit 16 is 0
wire m2s1b17;	// sum bit 17 assuming carry out bit 16 is 1
wire m2s0b18;	// sum bit 18 assuming carry out bit 16 is 0
wire m2s1b18;	// sum bit 18 assuming carry out bit 16 is 1
wire m2c0b18;	// carry in to bit 18 assuming carry out bit 16 is 0
wire m2c1b18;	// carry in to bit 18 assuming carry out bit 16 is 1

wire m2s0b21;	// sum bit 21 assuming carry out bit 20 is 0
wire m2s1b21;	// sum bit 21 assuming carry out bit 20 is 1
wire m2s0b22;	// sum bit 22 assuming carry out bit 20 is 0
wire m2s1b22;	// sum bit 22 assuming carry out bit 20 is 1
wire m2c0b22;	// carry in to bit 22 assuming carry out bit 20 is 0
wire m2c1b22;	// carry in to bit 22 assuming carry out bit 20 is 1

wire m2s0b25;	// sum bit 25 assuming carry out bit 24 is 0
wire m2s1b25;	// sum bit 25 assuming carry out bit 24 is 1
wire m2s0b26;	// sum bit 26 assuming carry out bit 24 is 0
wire m2s1b26;	// sum bit 26 assuming carry out bit 24 is 1
wire m2c0b26;	// carry in to bit 26 assuming carry out bit 24 is 0
wire m2c1b26;	// carry in to bit 26 assuming carry out bit 24 is 1

wire m2s0b29;	// sum bit 29 assuming carry out bit 28 is 0
wire m2s1b29;	// sum bit 29 assuming carry out bit 28 is 1
wire m2s0b30;	// sum bit 30 assuming carry out bit 28 is 0
wire m2s1b30;	// sum bit 30 assuming carry out bit 28 is 1
wire m2c0b30;	// carry in to bit 30 assuming carry out bit 28 is 0
wire m2c1b30;	// carry in to bit 30 assuming carry out bit 28 is 1

mx21d1h mx2s0b1  (.s(m1c0b0), .i0(s0[1]), .i1(s1[1]), .z(s[1]));
mx21d1h mx2s0b2  (.s(m1c0b0), .i0(m1s0b2), .i1(m1s1b2), .z(s[2]));
mx21d1h mx2c0b2  (.s(m1c0b0), .i0(m1c0b2), .i1(m1c1b2), .z(m2c0b2));

mx21d1h mx2s0b5  (.s(m1c0b4), .i0(s0[5]), .i1(s1[5]), .z(m2s0b5));
mx21d1h mx2s1b5  (.s(m1c1b4), .i0(s0[5]), .i1(s1[5]), .z(m2s1b5));
mx21d1h mx2s0b6  (.s(m1c0b4), .i0(m1s0b6), .i1(m1s1b6), .z(m2s0b6));
mx21d1h mx2s1b6  (.s(m1c1b4), .i0(m1s0b6), .i1(m1s1b6), .z(m2s1b6));
mx21d1h mx2c0b6  (.s(m1c0b4), .i0(m1c0b6), .i1(m1c1b6), .z(m2c0b6));
mx21d1h mx2c1b6  (.s(m1c1b4), .i0(m1c0b6), .i1(m1c1b6), .z(m2c1b6));

mx21d1h mx2s0b9  (.s(m1c0b8), .i0(s0[9]), .i1(s1[9]), .z(m2s0b9));
mx21d1h mx2s1b9  (.s(m1c1b8), .i0(s0[9]), .i1(s1[9]), .z(m2s1b9));
mx21d1h mx2s0b10 (.s(m1c0b8), .i0(m1s0b10), .i1(m1s1b10), .z(m2s0b10));
mx21d1h mx2s1b10 (.s(m1c1b8), .i0(m1s0b10), .i1(m1s1b10), .z(m2s1b10));
mx21d1h mx2c0b10 (.s(m1c0b8), .i0(m1c0b10), .i1(m1c1b10), .z(m2c0b10));
mx21d1h mx2c1b10 (.s(m1c1b8), .i0(m1c0b10), .i1(m1c1b10), .z(m2c1b10));

mx21d1h mx2s0b13 (.s(m1c0b12), .i0(s0[13]), .i1(s1[13]), .z(m2s0b13));
mx21d1h mx2s1b13 (.s(m1c1b12), .i0(s0[13]), .i1(s1[13]), .z(m2s1b13));
mx21d1h mx2s0b14 (.s(m1c0b12), .i0(m1s0b14), .i1(m1s1b14), .z(m2s0b14));
mx21d1h mx2s1b14 (.s(m1c1b12), .i0(m1s0b14), .i1(m1s1b14), .z(m2s1b14));
mx21d1h mx2c0b14 (.s(m1c0b12), .i0(m1c0b14), .i1(m1c1b14), .z(m2c0b14));
mx21d1h mx2c1b14 (.s(m1c1b12), .i0(m1c0b14), .i1(m1c1b14), .z(m2c1b14));

mx21d1h mx2s0b17 (.s(m1c0b16), .i0(s0[17]), .i1(s1[17]), .z(m2s0b17));
mx21d1h mx2s1b17 (.s(m1c1b16), .i0(s0[17]), .i1(s1[17]), .z(m2s1b17));
mx21d1h mx2s0b18 (.s(m1c0b16), .i0(m1s0b18), .i1(m1s1b18), .z(m2s0b18));
mx21d1h mx2s1b18 (.s(m1c1b16), .i0(m1s0b18), .i1(m1s1b18), .z(m2s1b18));
mx21d1h mx2c0b18 (.s(m1c0b16), .i0(m1c0b18), .i1(m1c1b18), .z(m2c0b18));
mx21d1h mx2c1b18 (.s(m1c1b16), .i0(m1c0b18), .i1(m1c1b18), .z(m2c1b18));

mx21d1h mx2s0b21 (.s(m1c0b20), .i0(s0[21]), .i1(s1[21]), .z(m2s0b21));
mx21d1h mx2s1b21 (.s(m1c1b20), .i0(s0[21]), .i1(s1[21]), .z(m2s1b21));
mx21d1h mx2s0b22 (.s(m1c0b20), .i0(m1s0b22), .i1(m1s1b22), .z(m2s0b22));
mx21d1h mx2s1b22 (.s(m1c1b20), .i0(m1s0b22), .i1(m1s1b22), .z(m2s1b22));
mx21d1h mx2c0b22 (.s(m1c0b20), .i0(m1c0b22), .i1(m1c1b22), .z(m2c0b22));
mx21d1h mx2c1b22 (.s(m1c1b20), .i0(m1c0b22), .i1(m1c1b22), .z(m2c1b22));

mx21d1h mx2s0b25 (.s(m1c0b24), .i0(s0[25]), .i1(s1[25]), .z(m2s0b25));
mx21d1h mx2s1b25 (.s(m1c1b24), .i0(s0[25]), .i1(s1[25]), .z(m2s1b25));
mx21d1h mx2s0b26 (.s(m1c0b24), .i0(m1s0b26), .i1(m1s1b26), .z(m2s0b26));
mx21d1h mx2s1b26 (.s(m1c1b24), .i0(m1s0b26), .i1(m1s1b26), .z(m2s1b26));
mx21d1h mx2c0b26 (.s(m1c0b24), .i0(m1c0b26), .i1(m1c1b26), .z(m2c0b26));
mx21d1h mx2c1b26 (.s(m1c1b24), .i0(m1c0b26), .i1(m1c1b26), .z(m2c1b26));

mx21d1h mx2s0b29 (.s(m1c0b28), .i0(s0[29]), .i1(s1[29]), .z(m2s0b29));
mx21d1h mx2s1b29 (.s(m1c1b28), .i0(s0[29]), .i1(s1[29]), .z(m2s1b29));
mx21d1h mx2s0b30 (.s(m1c0b28), .i0(m1s0b30), .i1(m1s1b30), .z(m2s0b30));
mx21d1h mx2s1b30 (.s(m1c1b28), .i0(m1s0b30), .i1(m1s1b30), .z(m2s1b30));
mx21d1h mx2c0b30 (.s(m1c0b28), .i0(m1c0b30), .i1(m1c1b30), .z(m2c0b30));
mx21d1h mx2c1b30 (.s(m1c1b28), .i0(m1c0b30), .i1(m1c1b30), .z(m2c1b30));


// third rank of muxes:

wire m3c0b6;	// carry out from bit 6
wire m3c0b6b;	// carry out from bit 6, buffered version

wire m3s0b11;	// sum bit 11 assuming carry out bit 10 is 0
wire m3s1b11;	// sum bit 11 assuming carry out bit 10 is 1
wire m3s0b12;	// sum bit 12 assuming carry out bit 10 is 0
wire m3s1b12;	// sum bit 12 assuming carry out bit 10 is 1
wire m3s0b13;	// sum bit 13 assuming carry out bit 10 is 0
wire m3s1b13;	// sum bit 13 assuming carry out bit 10 is 1
wire m3s0b14;	// sum bit 14 assuming carry out bit 10 is 0
wire m3s1b14;	// sum bit 14 assuming carry out bit 10 is 1
wire m3c0b14;	// carry out of bit 14 assuming carry out bit 10 is 0
wire m3c1b14;	// carry out of bit 14 assuming carry out bit 10 is 1

wire m3s0b19;	// sum bit 19 assuming carry out bit 18 is 0
wire m3s1b19;	// sum bit 19 assuming carry out bit 18 is 1
wire m3s0b20;	// sum bit 20 assuming carry out bit 18 is 0
wire m3s1b20;	// sum bit 20 assuming carry out bit 18 is 1
wire m3s0b21;	// sum bit 21 assuming carry out bit 18 is 0
wire m3s1b21;	// sum bit 21 assuming carry out bit 18 is 1
wire m3s0b22;	// sum bit 22 assuming carry out bit 18 is 0
wire m3s1b22;	// sum bit 22 assuming carry out bit 18 is 1
wire m3c0b22;	// carry out of bit 22 assuming carry out bit 18 is 0
wire m3c1b22;	// carry out of bit 22 assuming carry out bit 18 is 1
wire m3c0b22b;	// carry out of bit 22 assuming carry out bit 18 is 0, buffered
wire m3c1b22b;	// carry out of bit 22 assuming carry out bit 18 is 1, buffered

wire m3s0b27;	// sum bit 27 assuming carry out bit 26 is 0
wire m3s1b27;	// sum bit 27 assuming carry out bit 26 is 1
wire m3s0b28;	// sum bit 28 assuming carry out bit 26 is 0
wire m3s1b28;	// sum bit 28 assuming carry out bit 26 is 1
wire m3s0b29;	// sum bit 29 assuming carry out bit 26 is 0
wire m3s1b29;	// sum bit 29 assuming carry out bit 26 is 1
wire m3s0b30;	// sum bit 30 assuming carry out bit 26 is 0
wire m3s1b30;	// sum bit 30 assuming carry out bit 26 is 1
wire m3c0b30;	// carry out of bit 30 assuming carry out bit 26 is 0
wire m3c1b30;	// carry out of bit 30 assuming carry out bit 26 is 1

mx21d1h mx3s0b3  (.s(m2c0b2 ), .i0(s0[3]), .i1(s1[3]), .z(s[3]));
mx21d1h mx3s0b4  (.s(m2c0b2 ), .i0(m1s0b4), .i1(m1s1b4), .z(s[4]));
mx21d1h mx3s0b5  (.s(m2c0b2 ), .i0(m2s0b5), .i1(m2s1b5), .z(s[5]));
mx21d1h mx3s0b6  (.s(m2c0b2 ), .i0(m2s0b6), .i1(m2s1b6), .z(s[6]));
mx21d1h mx3c0b6  (.s(m2c0b2 ), .i0(m2c0b6), .i1(m2c1b6), .z(m3c0b6));
ni01d4  ni3c0b6  (.i(m3c0b6 ),                           .z(m3c0b6b));

mx21d1h mx3s0b11 (.s(m2c0b10), .i0(s0[11]), .i1(s1[11]), .z(m3s0b11));
mx21d1h mx3s1b11 (.s(m2c1b10), .i0(s0[11]), .i1(s1[11]), .z(m3s1b11));
mx21d1h mx3s0b12 (.s(m2c0b10), .i0(m1s0b12), .i1(m1s1b12), .z(m3s0b12));
mx21d1h mx3s1b12 (.s(m2c1b10), .i0(m1s0b12), .i1(m1s1b12), .z(m3s1b12));
mx21d1h mx3s0b13 (.s(m2c0b10), .i0(m2s0b13), .i1(m2s1b13), .z(m3s0b13));
mx21d1h mx3s1b13 (.s(m2c1b10), .i0(m2s0b13), .i1(m2s1b13), .z(m3s1b13));
mx21d1h mx3s0b14 (.s(m2c0b10), .i0(m2s0b14), .i1(m2s1b14), .z(m3s0b14));
mx21d1h mx3s1b14 (.s(m2c1b10), .i0(m2s0b14), .i1(m2s1b14), .z(m3s1b14));
mx21d1h mx3c0b14 (.s(m2c0b10), .i0(m2c0b14), .i1(m2c1b14), .z(m3c0b14));
mx21d1h mx3c1b14 (.s(m2c1b10), .i0(m2c0b14), .i1(m2c1b14), .z(m3c1b14));

mx21d1h mx3s0b19 (.s(m2c0b18), .i0(s0[19]), .i1(s1[19]), .z(m3s0b19));
mx21d1h mx3s1b19 (.s(m2c1b18), .i0(s0[19]), .i1(s1[19]), .z(m3s1b19));
mx21d1h mx3s0b20 (.s(m2c0b18), .i0(m1s0b20), .i1(m1s1b20), .z(m3s0b20));
mx21d1h mx3s1b20 (.s(m2c1b18), .i0(m1s0b20), .i1(m1s1b20), .z(m3s1b20));
mx21d1h mx3s0b21 (.s(m2c0b18), .i0(m2s0b21), .i1(m2s1b21), .z(m3s0b21));
mx21d1h mx3s1b21 (.s(m2c1b18), .i0(m2s0b21), .i1(m2s1b21), .z(m3s1b21));
mx21d1h mx3s0b22 (.s(m2c0b18), .i0(m2s0b22), .i1(m2s1b22), .z(m3s0b22));
mx21d1h mx3s1b22 (.s(m2c1b18), .i0(m2s0b22), .i1(m2s1b22), .z(m3s1b22));
mx21d1h mx3c0b22 (.s(m2c0b18), .i0(m2c0b22), .i1(m2c1b22), .z(m3c0b22));
mx21d1h mx3c1b22 (.s(m2c1b18), .i0(m2c0b22), .i1(m2c1b22), .z(m3c1b22));
ni01d4  ni3c0b22 (.i(m3c0b22),                             .z(m3c0b22b));
ni01d4  ni3c1b22 (.i(m3c1b22),                             .z(m3c1b22b));

mx21d1h mx3s0b27 (.s(m2c0b26), .i0(s0[27]), .i1(s1[27]), .z(m3s0b27));
mx21d1h mx3s1b27 (.s(m2c1b26), .i0(s0[27]), .i1(s1[27]), .z(m3s1b27));
mx21d1h mx3s0b28 (.s(m2c0b26), .i0(m1s0b28), .i1(m1s1b28), .z(m3s0b28));
mx21d1h mx3s1b28 (.s(m2c1b26), .i0(m1s0b28), .i1(m1s1b28), .z(m3s1b28));
mx21d1h mx3s0b29 (.s(m2c0b26), .i0(m2s0b29), .i1(m2s1b29), .z(m3s0b29));
mx21d1h mx3s1b29 (.s(m2c1b26), .i0(m2s0b29), .i1(m2s1b29), .z(m3s1b29));
mx21d1h mx3s0b30 (.s(m2c0b26), .i0(m2s0b30), .i1(m2s1b30), .z(m3s0b30));
mx21d1h mx3s1b30 (.s(m2c1b26), .i0(m2s0b30), .i1(m2s1b30), .z(m3s1b30));
mx21d1h mx3c0b30 (.s(m2c0b26), .i0(m2c0b30), .i1(m2c1b30), .z(m3c0b30));
mx21d1h mx3c1b30 (.s(m2c1b26), .i0(m2c0b30), .i1(m2c1b30), .z(m3c1b30));


// fourth rank of muxes:

wire m4c0b14;	// carry out from bit 14
wire m4c0b14b;	// carry out from bit 14, buffered version 1
wire m4c0b14c;	// carry out from bit 14, buffered version 2

wire m4s0b23;	// sum bit 23 assuming carry out bit 22 is 0
wire m4s1b23;	// sum bit 23 assuming carry out bit 22 is 1
wire m4s0b24;	// sum bit 24 assuming carry out bit 22 is 0
wire m4s1b24;	// sum bit 24 assuming carry out bit 22 is 1
wire m4s0b25;	// sum bit 25 assuming carry out bit 22 is 0
wire m4s1b25;	// sum bit 25 assuming carry out bit 22 is 1
wire m4s0b26;	// sum bit 26 assuming carry out bit 22 is 0
wire m4s1b26;	// sum bit 26 assuming carry out bit 22 is 1
wire m4s0b27;	// sum bit 27 assuming carry out bit 22 is 0
wire m4s1b27;	// sum bit 27 assuming carry out bit 22 is 1
wire m4s0b28;	// sum bit 28 assuming carry out bit 22 is 0
wire m4s1b28;	// sum bit 28 assuming carry out bit 22 is 1
wire m4s0b29;	// sum bit 29 assuming carry out bit 22 is 0
wire m4s1b29;	// sum bit 29 assuming carry out bit 22 is 1
wire m4s0b30;	// sum bit 30 assuming carry out bit 22 is 0
wire m4s1b30;	// sum bit 30 assuming carry out bit 22 is 1
wire m4c0b30;	// carry out of bit 30 assuming carry out bit 22 is 0
wire m4c1b30;	// carry out of bit 30 assuming carry out bit 22 is 1


mx21d1h mx4s0b7  (.s(m3c0b6b), .i0(s0[7]), .i1(s1[7]), .z(s[7]));
mx21d1h mx4s0b8  (.s(m3c0b6b), .i0(m1s0b8), .i1(m1s1b8), .z(s[8]));
mx21d1h mx4s0b9  (.s(m3c0b6b), .i0(m2s0b9), .i1(m2s1b9), .z(s[9]));
mx21d1h mx4s0b10 (.s(m3c0b6b), .i0(m2s0b10), .i1(m2s1b10), .z(s[10]));
mx21d1h mx4s0b11 (.s(m3c0b6b), .i0(m3s0b11), .i1(m3s1b11), .z(s[11]));
mx21d1h mx4s0b12 (.s(m3c0b6b), .i0(m3s0b12), .i1(m3s1b12), .z(s[12]));
mx21d1h mx4s0b13 (.s(m3c0b6b), .i0(m3s0b13), .i1(m3s1b13), .z(s[13]));
mx21d1h mx4s0b14 (.s(m3c0b6b), .i0(m3s0b14), .i1(m3s1b14), .z(s[14]));
mx21d1h mx4c0b14 (.s(m3c0b6 ), .i0(m3c0b14), .i1(m3c1b14), .z(m4c0b14));
ni01d4  ni4c0b14 (.i(m4c0b14),                             .z(m4c0b14b));
ni01d4  ni4c0c14 (.i(m4c0b14),                             .z(m4c0b14c));

mx21d1h mx4s0b23 (.s(m3c0b22b), .i0(s0[23]), .i1(s1[23]), .z(m4s0b23));
mx21d1h mx4s1b23 (.s(m3c1b22b), .i0(s0[23]), .i1(s1[23]), .z(m4s1b23));
mx21d1h mx4s0b24 (.s(m3c0b22b), .i0(m1s0b24), .i1(m1s1b24), .z(m4s0b24));
mx21d1h mx4s1b24 (.s(m3c1b22b), .i0(m1s0b24), .i1(m1s1b24), .z(m4s1b24));
mx21d1h mx4s0b25 (.s(m3c0b22b), .i0(m2s0b25), .i1(m2s1b25), .z(m4s0b25));
mx21d1h mx4s1b25 (.s(m3c1b22b), .i0(m2s0b25), .i1(m2s1b25), .z(m4s1b25));
mx21d1h mx4s0b26 (.s(m3c0b22b), .i0(m2s0b26), .i1(m2s1b26), .z(m4s0b26));
mx21d1h mx4s1b26 (.s(m3c1b22b), .i0(m2s0b26), .i1(m2s1b26), .z(m4s1b26));
mx21d1h mx4s0b27 (.s(m3c0b22b), .i0(m3s0b27), .i1(m3s1b27), .z(m4s0b27));
mx21d1h mx4s1b27 (.s(m3c1b22b), .i0(m3s0b27), .i1(m3s1b27), .z(m4s1b27));
mx21d1h mx4s0b28 (.s(m3c0b22b), .i0(m3s0b28), .i1(m3s1b28), .z(m4s0b28));
mx21d1h mx4s1b28 (.s(m3c1b22b), .i0(m3s0b28), .i1(m3s1b28), .z(m4s1b28));
mx21d1h mx4s0b29 (.s(m3c0b22b), .i0(m3s0b29), .i1(m3s1b29), .z(m4s0b29));
mx21d1h mx4s1b29 (.s(m3c1b22b), .i0(m3s0b29), .i1(m3s1b29), .z(m4s1b29));
mx21d1h mx4s0b30 (.s(m3c0b22b), .i0(m3s0b30), .i1(m3s1b30), .z(m4s0b30));
mx21d1h mx4s1b30 (.s(m3c1b22b), .i0(m3s0b30), .i1(m3s1b30), .z(m4s1b30));
mx21d1h mx4c0b30 (.s(m3c0b22b), .i0(m3c0b30), .i1(m3c1b30), .z(m4c0b30));
mx21d1h mx4c1b30 (.s(m3c1b22b), .i0(m3c0b30), .i1(m3c1b30), .z(m4c1b30));

// fifth rank of muxes:

wire m5c0b30;	// carry out from bit 30 (copy)

mx21d1h mx5s0b15 (.s(m4c0b14b), .i0(s0[15]), .i1(s1[15]), .z(s[15]));
mx21d1h mx5s0b16 (.s(m4c0b14b), .i0(m1s0b16), .i1(m1s1b16), .z(s[16]));
mx21d1h mx5s0b17 (.s(m4c0b14b), .i0(m2s0b17), .i1(m2s1b17), .z(s[17]));
mx21d1h mx5s0b18 (.s(m4c0b14b), .i0(m2s0b18), .i1(m2s1b18), .z(s[18]));
mx21d1h mx5s0b19 (.s(m4c0b14b), .i0(m3s0b19), .i1(m3s1b19), .z(s[19]));
mx21d1h mx5s0b20 (.s(m4c0b14b), .i0(m3s0b20), .i1(m3s1b20), .z(s[20]));
mx21d1h mx5s0b21 (.s(m4c0b14b), .i0(m3s0b21), .i1(m3s1b21), .z(s[21]));
mx21d1h mx5s0b22 (.s(m4c0b14b), .i0(m3s0b22), .i1(m3s1b22), .z(s[22]));
mx21d1h mx5s0b23 (.s(m4c0b14c), .i0(m4s0b23), .i1(m4s1b23), .z(s[23]));
mx21d1h mx5s0b24 (.s(m4c0b14c), .i0(m4s0b24), .i1(m4s1b24), .z(s[24]));
mx21d1h mx5s0b25 (.s(m4c0b14c), .i0(m4s0b25), .i1(m4s1b25), .z(s[25]));
mx21d1h mx5s0b26 (.s(m4c0b14c), .i0(m4s0b26), .i1(m4s1b26), .z(s[26]));
mx21d1h mx5s0b27 (.s(m4c0b14c), .i0(m4s0b27), .i1(m4s1b27), .z(s[27]));
mx21d1h mx5s0b28 (.s(m4c0b14c), .i0(m4s0b28), .i1(m4s1b28), .z(s[28]));
mx21d1h mx5s0b29 (.s(m4c0b14c), .i0(m4s0b29), .i1(m4s1b29), .z(s[29]));
mx21d1h mx5s0b30 (.s(m4c0b14c), .i0(m4s0b30), .i1(m4s1b30), .z(s[30]));
mx21d1h mx5co30  (.s(m4c0b14 ), .i0(m4c0b30), .i1(m4c1b30), .z(co30));
mx21d1h mx5c0b30 (.s(m4c0b14 ), .i0(m4c0b30), .i1(m4c1b30), .z(m5c0b30));


// sixth rank of muxes:

mx21d1h mx6s0b31 (.s(m5c0b30), .i0(s0[31]), .i1(s1[31]), .z(s[31]));
mx21d1h mx6c0b31 (.s(m5c0b30), .i0(c0[31]), .i1(c1[31]), .z(co));


endmodule // sudp_add32