sudp_sc.v
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/*
*************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
*************************************************************************
*/
/*
*************************************************************************
* *
* Project Reality *
* *
* module: sudp_sc.v *
* description: Scalar unit data path, standard cell version *
* *
* designer: Phil Gossett *
* date: 4/7/95 *
* *
*************************************************************************
*/
// $Id: sudp_sc.v,v 1.1.1.1 2002/05/17 06:14:58 blythe Exp $
module sudp_sc (clk, surf_wen, surf_w, surf_ra, surf_rb,
suwben, suimmlsmux, suimmmux, suvulsoffsetmux, surdbmux,
sudrivels, surdamux, suonesdet_z,
sushbmux, sushamux, suslten, sualuen, sualu_ovr, sualu_cout,
sualu_cin, sualu, sualuamux, sualubmux, inst_data, link_pc_delay_pc,
branch_or_addr, ls_data, suexbsign, sushvamt, suexasign, susltlt,
sualumsb, shiftamt);
input clk;
input surf_wen; // reg file write enable
input [4:0] surf_w; // reg file write address
input [4:0] surf_ra; // reg file read A port address
input [4:0] surf_rb; // reg file read B port address
input suwben;
input suimmlsmux; // was 2 bit unary
input [1:0] suimmmux; // was 4 bit unary
input [2:0] suvulsoffsetmux; // was 5 bit unary
input [2:0] surdbmux; // was 6 bit unary
// deleted input suloaden (complement of suwben)
input sudrivels;
input [2:0] surdamux; // was 5 bit unary
output suonesdet_z;
// deleted input sushift_s (unused, always 0)
input [1:0] sushbmux; // was 3 bit unary
input [1:0] sushamux; // was 4 bit unary
input suslten;
// deleted input sushen (complement of sualuen and suslten)
input sualuen;
output sualu_ovr;
output sualu_cout;
input sualu_cin;
input [4:0] sualu;
input sualuamux; // was 2 bit unary
input sualubmux; // was 2 bit unary
input [15:0] inst_data;
input [23:0] link_pc_delay_pc;
output [11:0] branch_or_addr;
inout [31:0] ls_data;
output suexbsign;
output [4:0] sushvamt;
output suexasign;
input susltlt;
output sualumsb;
input [4:0] shiftamt; // was 32 bit unary
wire [31:0] ls_offset;
wire [31:0] ex_b_src; // was b15
wire [31:0] rd_a_src; // was b16
wire [31:0] ex_a_src; // was b17
wire [31:0] imm_data;
// deleted wire b23 (unused???)
wire [31:0] rt;
wire [31:0] ex_data;
wire [31:0] df_data;
wire [31:0] wb_data;
wire [31:0] ex_imm_data;
wire [31:0] rd_imm_data; // was b31
wire [31:0] rd_b_src;
wire [31:0] rs;
wire [31:0] alu_out; // was b38
// deleted wire b40 (now inside sudp_eq)
wire [31:0] sh_b_src;
wire [31:0] sh_a_src;
wire [31:0] shift_out;
wire [31:0] alu_a_src;
wire [31:0] alu_b_src;
wire [31:0] pre_wb_data; // was b54
wire [31:0] alu_shift_out; // new signal
wire [31:0] inst_data_buf; // new signal
supply0 [31:0] vss;
supply1 [31:0] vdd;
assign branch_or_addr[11:0] = alu_out[11:0];
assign suexbsign = ex_b_src[31];
assign sushvamt[4:0] = rd_a_src[4:0];
assign suexasign = ex_a_src[31];
assign sualumsb = alu_out[31];
sudp_rf surfilei(
.clk(clk),
.d(wb_data[31:0]),
.a(rs[31:0]),
.b(rt[31:0]),
.wen(surf_wen),
.w(surf_w[4:0]),
.ra(surf_ra[4:0]),
.rb(surf_rb[4:0]));
sudp_reg suedffi(
.d(ex_data[31:0]),
.q(df_data[31:0]),
.clk(clk));
sudp_reg sudwffi(
.d(df_data[31:0]),
.q(pre_wb_data[31:0]),
.clk(clk));
sudp_mx21 suimmlsmuxi(
.z(rd_imm_data[31:0]),
.i1(ls_offset[31:0]),
.i0(imm_data[31:0]),
.s(suimmlsmux));
sudp_reg sureinstffi(
.d(rd_imm_data[31:0]),
.q(ex_imm_data[31:0]),
.clk(clk));
sudp_buf sudpbufi(
.i({{4{inst_data[15]}}, {12{inst_data[6]}}, inst_data}),
.z(inst_data_buf)); // note the msb's are copied bufs
sudp_mx41 suimmmuxi(
.z(imm_data[31:0]),
.i0({vss[31:16], inst_data_buf[15:0]}),
.i1({inst_data_buf[28],
inst_data_buf[28], inst_data_buf[28], inst_data_buf[28],
inst_data_buf[28], inst_data_buf[28], inst_data_buf[28],
inst_data_buf[28], inst_data_buf[29], inst_data_buf[29],
inst_data_buf[29], inst_data_buf[29], inst_data_buf[29],
inst_data_buf[29], inst_data_buf[29], inst_data_buf[29],
inst_data_buf[30], inst_data_buf[14:0]}),
.i2({inst_data_buf[15:0], vss[15:0]}),
.i3({inst_data_buf[30],
inst_data_buf[30], inst_data_buf[30], inst_data_buf[30],
inst_data_buf[30], inst_data_buf[30], inst_data_buf[30],
inst_data_buf[31], inst_data_buf[31], inst_data_buf[31],
inst_data_buf[31], inst_data_buf[31], inst_data_buf[31],
inst_data_buf[31], inst_data_buf[31],
inst_data_buf[14:0], vss[1:0]}),
.s(suimmmux[1:0]));
sudp_mx81 suvulsoffsetmuxi(
.z(ls_offset[31:0]),
.i0({inst_data_buf[16], inst_data_buf[16],
inst_data_buf[16], inst_data_buf[16], inst_data_buf[16],
inst_data_buf[16], inst_data_buf[16], inst_data_buf[16],
inst_data_buf[16], inst_data_buf[17], inst_data_buf[17],
inst_data_buf[17], inst_data_buf[17], inst_data_buf[17],
inst_data_buf[17], inst_data_buf[17], inst_data_buf[17],
inst_data_buf[17], inst_data_buf[17], inst_data_buf[18],
inst_data_buf[18], inst_data_buf[18], inst_data_buf[18],
inst_data_buf[18], inst_data_buf[18], inst_data_buf[18],
inst_data_buf[5:0]}),
.i1({inst_data_buf[18], inst_data_buf[18],
inst_data_buf[18], inst_data_buf[19], inst_data_buf[19],
inst_data_buf[19], inst_data_buf[19], inst_data_buf[19],
inst_data_buf[19], inst_data_buf[19], inst_data_buf[19],
inst_data_buf[19], inst_data_buf[19], inst_data_buf[20],
inst_data_buf[20], inst_data_buf[20], inst_data_buf[20],
inst_data_buf[20], inst_data_buf[20], inst_data_buf[20],
inst_data_buf[20], inst_data_buf[20], inst_data_buf[20],
inst_data_buf[21], inst_data_buf[21],
inst_data_buf[5:0], vss[0]}),
.i2({inst_data_buf[21], inst_data_buf[21],
inst_data_buf[21], inst_data_buf[21], inst_data_buf[21],
inst_data_buf[21], inst_data_buf[21], inst_data_buf[21],
inst_data_buf[22], inst_data_buf[22], inst_data_buf[22],
inst_data_buf[22], inst_data_buf[22], inst_data_buf[22],
inst_data_buf[22], inst_data_buf[22], inst_data_buf[22],
inst_data_buf[22], inst_data_buf[23], inst_data_buf[23],
inst_data_buf[23], inst_data_buf[23], inst_data_buf[23],
inst_data_buf[23],
inst_data_buf[5:0], vss[1:0]}),
.i3({inst_data_buf[23], inst_data_buf[23],
inst_data_buf[23], inst_data_buf[23], inst_data_buf[23],
inst_data_buf[24], inst_data_buf[24], inst_data_buf[24],
inst_data_buf[24], inst_data_buf[24], inst_data_buf[24],
inst_data_buf[24], inst_data_buf[24], inst_data_buf[24],
inst_data_buf[24], inst_data_buf[25], inst_data_buf[25],
inst_data_buf[25], inst_data_buf[25], inst_data_buf[25],
inst_data_buf[25], inst_data_buf[25], inst_data_buf[25],
inst_data_buf[5:0], vss[2:0]}),
.i4({inst_data_buf[25], inst_data_buf[25],
inst_data_buf[26], inst_data_buf[26], inst_data_buf[26],
inst_data_buf[26], inst_data_buf[26], inst_data_buf[26],
inst_data_buf[26], inst_data_buf[26], inst_data_buf[26],
inst_data_buf[26], inst_data_buf[27], inst_data_buf[27],
inst_data_buf[27], inst_data_buf[27], inst_data_buf[27],
inst_data_buf[27], inst_data_buf[27], inst_data_buf[27],
inst_data_buf[27], inst_data_buf[27],
inst_data_buf[5:0], vss[3:0]}),
.i5(vss[31:0]),
.i6(vss[31:0]),
.i7(vss[31:0]),
.s(suvulsoffsetmux[2:0]));
sudp_mx81 surdbmuxi(
.z(rd_b_src[31:0]),
.i0(rt[31:0]),
.i1(ex_data[31:0]),
.i2(df_data[31:0]),
.i3(wb_data[31:0]),
.i4(imm_data[31:0]),
.i5(vss[31:0]),
.i6(vss[31:0]),
.i7(vss[31:0]),
.s(surdbmux[2:0]));
sudp_reg surebffi(
.d(rd_b_src[31:0]),
.q(ex_b_src[31:0]),
.clk(clk));
sudp_mx21 suwbenmuxi(
.z(wb_data[31:0]),
.i0(ls_data[31:0]),
.i1(pre_wb_data[31:0]),
.s(suwben));
sudp_tri sudrivelsi(
.i(ex_b_src[31:0]),
.z(ls_data[31:0]),
.en(sudrivels));
sudp_mx81 surdamuxi(
.z(rd_a_src[31:0]),
.i0(rs[31:0]),
.i1(ex_data[31:0]),
.i2(df_data[31:0]),
.i3(wb_data[31:0]),
.i4(vss[31:0]),
.i5(vss[31:0]),
.i6(vss[31:0]),
.i7(vss[31:0]),
.s(surdamux[2:0]));
sudp_reg sureaffi(
.d(rd_a_src[31:0]),
.q(ex_a_src[31:0]),
.clk(clk));
sudp_shift sushifti(
.a(sh_a_src[31:0]),
.b(sh_b_src[31:0]),
.z(shift_out[31:0]),
.s(shiftamt[4:0]));
sudp_mx41 sushbmuxi(
.z(sh_b_src[31:0]),
.i0({vss[31], ex_b_src[31:1]}),
.i1(vss[31:0]),
.i2(vdd[31:0]),
.i3(vss[31:0]),
.s(sushbmux[1:0]));
sudp_eq sueqi(
.a(ex_a_src[31:0]),
.b(ex_b_src[31:0]),
.z(suonesdet_z));
sudp_mx41 sushamuxi(
.z(sh_a_src[31:0]),
.i0(ex_a_src[31:0]),
.i1({ex_b_src[0], vss[30:0]}),
.i2(ex_b_src[31:0]),
.i3({vss[31:24], link_pc_delay_pc[23:0]}),
.s(sushamux[1:0]));
sudp_mx21 sualumuxi(
.i0(shift_out[31:0]),
.i1(alu_out[31:0]),
.z(alu_shift_out[31:0]),
.s(sualuen));
sudp_mx21 susltmuxi(
.i0(alu_shift_out[31:0]),
.i1({vss[31:1], susltlt}),
.z(ex_data[31:0]),
.s(suslten));
sudp_alu sualui(
.a(alu_a_src[31:0]),
.b(alu_b_src[31:0]),
.s(alu_out[31:0]),
.co30(sualu_ovr),
.co(sualu_cout),
.ci(sualu_cin),
.m(sualu[4:0]));
sudp_mx21 sualuamuxi(
.z(alu_a_src[31:0]),
.i1({vss[31:24], link_pc_delay_pc[23:0]}),
.i0(ex_a_src[31:0]),
.s(sualuamux));
sudp_mx21 sualubmuxi(
.z(alu_b_src[31:0]),
.i1(ex_imm_data[31:0]),
.i0(ex_b_src[31:0]),
.s(sualubmux));
endmodule // sudp_sc