cp.script
2.88 KB
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cp $ROOT/PR/rspsim/suregre/ready/add1.s .
cp $ROOT/PR/rspsim/suregre/ready/add2.s .
cp $ROOT/PR/rspsim/suregre/ready/addu1.s .
cp $ROOT/PR/rspsim/suregre/ready/addu2.s .
cp $ROOT/PR/rspsim/suregre/ready/bgezal1.s .
cp $ROOT/PR/rspsim/suregre/ready/bltzal1.s .
cp $ROOT/PR/rspsim/bpregre/ready/bptest2.s .
cp $ROOT/PR/rspsim/bpregre/ready/bptest3.s .
cp $ROOT/PR/rspsim/suregre/ready/ctc21.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm00.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm01.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm02.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm03.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm10.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm11.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm12.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm13.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm20.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm21.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm22.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm23.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm30.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm31.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm32.s .
cp $ROOT/PR/rspsim/diregre/ready/di_norm33.s .
cp $ROOT/PR/rspsim/ilregre/ready/iltest11.s .
cp $ROOT/PR/rspsim/ilregre/ready/iltest14.s .
cp $ROOT/PR/rspsim/ilregre/ready/iltest18.s .
cp $ROOT/PR/rspsim/ilregre/ready/iltest20.s .
cp $ROOT/PR/rspsim/ilregre/ready/iltest24.s .
cp $ROOT/PR/rspsim/suregre/ready/jal1.s .
cp $ROOT/PR/rspsim/suregre/ready/nor1.s .
cp $ROOT/PR/rspsim/suregre/ready/ori1.s .
cp $ROOT/PR/rspsim/suregre/ready/sb1.s .
cp $ROOT/PR/rspsim/suregre/ready/sh1.s .
cp $ROOT/PR/rspsim/suregre/ready/sra1.s .
cp $ROOT/PR/rspsim/suregre/ready/srav1.s .
cp $ROOT/PR/rspsim/suregre/ready/sub1.s .
cp $ROOT/PR/rspsim/suregre/ready/sub2.s .
cp $ROOT/PR/rspsim/suregre/ready/subu1.s .
cp $ROOT/PR/rspsim/suregre/ready/subu2.s .
cp $ROOT/PR/rspsim/suregre/ready/sw1.s .
cp $ROOT/PR/rspsim/suregre/ready/xor1.s .
cp $ROOT/PR/rspsim/suregre/ready/xori1.s .
cp $ROOT/PR/rspsim/vuregre/src/vch/vch_v.in .
cp $ROOT/PR/rspsim/vuregre/src/vcl/vcl_v.in .
cp $ROOT/PR/rspsim/vuregre/src/vcr/vcr_v.in .
cp $ROOT/PR/rspsim/vuregre/src/vmacf/vmacf_h.in .
cp $ROOT/PR/rspsim/vuregre/src/vmacf/vmacf_q.in .
cp $ROOT/PR/rspsim/vuregre/src/vmacf/vmacf_v.in .
cp $ROOT/PR/rspsim/vuregre/src/vmacf/vmacf_w.in .
cp $ROOT/PR/rspsim/vuregre/src/vmacu/vmacu_h.in .
cp $ROOT/PR/rspsim/vuregre/src/vmacu/vmacu_q.in .
cp $ROOT/PR/rspsim/vuregre/src/vmacu/vmacu_q.in .
cp $ROOT/PR/rspsim/vuregre/src/vmacu/vmacu_v.in .
cp $ROOT/PR/rspsim/vuregre/src/vmacu/vmacu_w.in .
cp $ROOT/PR/rspsim/vuregre/src/vmadl/vmadl_h.in .
cp $ROOT/PR/rspsim/vuregre/src/vmadm/vmadm_h.in .
cp $ROOT/PR/rspsim/vuregre/src/vmadm/vmadm_v1.in .
cp $ROOT/PR/rspsim/vuregre/src/vmadn/vmadn_h.in .
cp $ROOT/PR/rspsim/vuregre/src/vmadn/vmadn_w.in .
cp $ROOT/PR/rspsim/vuregre/src/vrndn/vrndn_h.in .
cp $ROOT/PR/rspsim/vuregre/src/vrndn/vrndn_q.in .