#include "suregre.h"

#define	c0000	$0
#define c5555	$2
#define cAAAA	$3
#define cFFFF	$4
#define TESTID	$1
#define c0004	$24
#define	MEMLOC	$25
#define	CNTR1	$26
#define	CNTR2	$27
#define ACCUM1	$28
#define ACCUM2	$29
#define SCRTCH	$30

/* #define SELF_CHECK */

#ifdef SELF_CHECK
#  define output(T,A,L)\
	bne	T,	A,	L
#else
#  define output(T,A,L)\
	sw	T,	0 (MEMLOC);\
	bne	T,	A,	L;\
	add	MEMLOC,	MEMLOC,	c0004;
#endif

	/* INITIALIZE REGISTERS */

	or	$1,	$0,	$0
	or	$2,	$0,	$0
	or	$3,	$0,	$0
	or	$4,	$0,	$0
	or	$5,	$0,	$0
	or	$6,	$0,	$0
	or	$7,	$0,	$0
	or	$8,	$0,	$0
	or	$9,	$0,	$0
	or	$10,	$0,	$0
	or	$11,	$0,	$0
	or	$12,	$0,	$0
	or	$13,	$0,	$0
	or	$14,	$0,	$0
	or	$15,	$0,	$0
	or	$16,	$0,	$0
	or	$17,	$0,	$0
	or	$18,	$0,	$0
	or	$19,	$0,	$0
	or	$20,	$0,	$0
	or	$21,	$0,	$0
	or	$22,	$0,	$0
	or	$23,	$0,	$0
	or	$24,	$0,	$0
	or	$25,	$0,	$0
	or	$26,	$0,	$0
	or	$27,	$0,	$0
	or	$28,	$0,	$0
	or	$29,	$0,	$0
	or	$30,	$0,	$0
	or	$31,	$0,	$0

	or	TESTID,	c0000,	c0000
	lui	c5555,	0x5555
	ori	c5555,	c5555,	0x5555
	lui	cAAAA,	0xAAAA
	ori	cAAAA,	cAAAA,	0xAAAA
	lui	cFFFF,	0xFFFF
	ori	cFFFF,	cFFFF,	0xFFFF

	ori	c0004,	c0000,	0x0004
	or	MEMLOC,	c0000,	c0000
	or	CNTR1,	c0000,	c0000
	or	CNTR2,	c0000,	c0000
	or	ACCUM1,	c0000,	c0000
	or	ACCUM2,	c0000,	c0000
	or	SCRTCH,	c0000,	c0000

	/* ADDITION */

	ori	TESTID,	c0000,	1

	add	SCRTCH,	cFFFF,	c0000	/* 0xFFFFFFFF + 0x00000000 */
	output(	SCRTCH,	cFFFF,	Fail)
	addu	SCRTCH,	c0000,	cFFFF	/* 0x00000000 + 0xFFFFFFFF */
	output(	SCRTCH,	cFFFF,	Fail)
	add	SCRTCH,	c0000,	c0000	/* 0x00000000 + 0x00000000 */
	output(	SCRTCH,	c0000,	Fail)
	addu	SCRTCH,	c5555,	c5555	/* 0x55555555 + 0x55555555 */
	output(	SCRTCH,	cAAAA,	Fail)
	add	SCRTCH,	cAAAA,	c5555	/* 0xAAAAAAAA + 0x55555555 */
	output(	SCRTCH,	cFFFF,	Fail)
	addi	ACCUM1,	cAAAA,	0x0001	/* 0x55555555 + 0xAAAAAAAB */
	addu	SCRTCH,	c5555,	ACCUM1	
	output(	SCRTCH,	c0000,	Fail)
	add	SCRTCH,	ACCUM1,	c5555	/* 0xAAAAAAAB + 0x55555555 */
	output(	SCRTCH,	c0000,	Fail)

	lui	ACCUM1,	0x5554		/* 0x55555555 + 0xFFFFAAAA */
	ori	ACCUM1,	ACCUM1,	0xFFFF
	addi	SCRTCH,	c5555,	0xAAAA
	bne	SCRTCH,	ACCUM1,	Fail

	lui	ACCUM1,	0xAAAA		/* 0xAAAAAAAA + 0x00005555 */
	ori	ACCUM1,	ACCUM1,	0xFFFF
	addiu	SCRTCH,	cAAAA,	0x5555
	bne	SCRTCH,	ACCUM1,	Fail

	/* SUBTRACTION */

	ori	TESTID,	c0000,	2

	sub	SCRTCH,	cFFFF,	cFFFF	/* 0xFFFFFFFF - 0xFFFFFFFF */
	output(	SCRTCH,	c0000,	Fail)
	subu	SCRTCH,	cFFFF,	c0000	/* 0xFFFFFFFF - 0x00000000 */
	output(	SCRTCH,	cFFFF,	Fail)
	sub	SCRTCH,	c0000,	cFFFF	/* 0x00000000 - 0xFFFFFFFF */
	add	SCRTCH,	SCRTCH,	cFFFF	/*	      + 0xFFFFFFFF */
	output(	SCRTCH,	c0000,	Fail)
	subu	SCRTCH,	cAAAA,	c5555	/* 0xAAAAAAAA - 0x55555555 */
	output(	SCRTCH,	c5555,	Fail)
	sub	SCRTCH,	c0000,	c0000	/* 0x00000000 - 0x00000000 */
	output(	SCRTCH,	c0000,	Fail)
	subu	SCRTCH,	c5555,	cAAAA	/* 0x55555555 - 0xAAAAAAAA */
	add	SCRTCH,	SCRTCH,	cFFFF	
	output(	SCRTCH,	cAAAA,	Fail)

	/* AND */

	ori	TESTID,	c0000,	3

	and	SCRTCH,	cFFFF,	c0000	/* 0xFFFFFFFF & 0x00000000 */
	output(	SCRTCH,	c0000,	Fail)
	and	SCRTCH,	cFFFF,	cFFFF	/* 0xFFFFFFFF & 0xFFFFFFFF */
	output(	SCRTCH,	cFFFF,	Fail)
	and	SCRTCH,	c0000,	cFFFF	/* 0x00000000 & 0xFFFFFFFF */
	output(	SCRTCH,	c0000,	Fail)
	and	SCRTCH,	cFFFF,	c5555	/* 0xFFFFFFFF & 0x55555555 */
	output(	SCRTCH,	c5555,	Fail)
	and	SCRTCH,	c0000,	c0000	/* 0x00000000 & 0x00000000 */
	output(	SCRTCH,	c0000,	Fail)
	and	SCRTCH,	c5555,	cFFFF	/* 0x55555555 & 0xFFFFFFFF */
	output(	SCRTCH,	c5555,	Fail)
	and	SCRTCH,	c5555,	cAAAA	/* 0x55555555 & 0xAAAAAAAA */
	output(	SCRTCH,	c0000,	Fail)
	and	SCRTCH,	cFFFF,	cAAAA	/* 0xFFFFFFFF & 0xAAAAAAAA */
	output(	SCRTCH,	cAAAA,	Fail)
	and	SCRTCH,	cAAAA,	c5555	/* 0xAAAAAAAA & 0x55555555 */
	output(	SCRTCH,	c0000,	Fail)
	and	SCRTCH,	cAAAA,	cFFFF	/* 0xAAAAAAAA & 0xFFFFFFFF */
	output(	SCRTCH,	cAAAA,	Fail)

	/* NOR */

	ori	TESTID,	c0000,	4

	nor	SCRTCH,	cFFFF,	c0000	/* ~(0xFFFFFFFF | 0x00000000) */
	output(	SCRTCH,	c0000,	Fail)
	nor	SCRTCH,	c0000,	c0000	/* ~(0x00000000 | 0x00000000) */
	output(	SCRTCH,	cFFFF,	Fail)
	nor	SCRTCH,	cFFFF,	c0000	/* ~(0x00000000 | 0xFFFFFFFF) */
	output(	SCRTCH,	c0000,	Fail)
	nor	SCRTCH,	c5555,	c0000	/* ~(0x55555555 | 0x00000000) */
	output(	SCRTCH,	cAAAA,	Fail)
	nor	SCRTCH,	c5555,	cAAAA	/* ~(0x55555555 | 0xAAAAAAAA) */
	output(	SCRTCH,	c0000,	Fail)
	nor	SCRTCH,	c0000,	cAAAA	/* ~(0x00000000 | 0xAAAAAAAA) */
	output(	SCRTCH,	c5555,	Fail)
	nor	SCRTCH,	c0000,	c5555	/* ~(0x00000000 | 0x55555555) */
	output(	SCRTCH,	cAAAA,	Fail)
	nor	SCRTCH,	cAAAA,	c5555	/* ~(0xAAAAAAAA | 0x55555555) */
	output(	SCRTCH,	c0000,	Fail)
	nor	SCRTCH,	cAAAA,	c0000	/* ~(0xAAAAAAAA | 0x00000000) */
	output(	SCRTCH,	c5555,	Fail)
	nor	SCRTCH,	cFFFF,	cFFFF	/* ~(0xFFFFFFFF | 0xFFFFFFFF) */
	output(	SCRTCH,	c0000,	Fail)

	/* OR */

	ori	TESTID,	c0000,	5

	or	SCRTCH,	cFFFF,	c0000	/* 0xFFFFFFFF | 0x00000000 */
	output(	SCRTCH,	cFFFF,	Fail)
	or	SCRTCH,	c0000,	c0000	/* 0x00000000 | 0x00000000 */
	output(	SCRTCH,	c0000,	Fail)
	or	SCRTCH,	cFFFF,	c0000	/* 0x00000000 | 0xFFFFFFFF */
	output(	SCRTCH,	cFFFF,	Fail)
	or	SCRTCH,	c5555,	c0000	/* 0x55555555 | 0x00000000 */
	output(	SCRTCH,	c5555,	Fail)
	or	SCRTCH,	c5555,	cAAAA	/* 0x55555555 | 0xAAAAAAAA */
	output(	SCRTCH,	cFFFF,	Fail)
	or	SCRTCH,	c0000,	cAAAA	/* 0x00000000 | 0xAAAAAAAA */
	output(	SCRTCH,	cAAAA,	Fail)
	or	SCRTCH,	c0000,	c5555	/* 0x00000000 | 0x55555555 */
	output(	SCRTCH,	c5555,	Fail)
	or	SCRTCH,	cAAAA,	c5555	/* 0xAAAAAAAA | 0x55555555 */
	output(	SCRTCH,	cFFFF,	Fail)
	or	SCRTCH,	cAAAA,	c0000	/* 0xAAAAAAAA | 0x00000000 */
	output(	SCRTCH,	cAAAA,	Fail)
	or	SCRTCH,	cFFFF,	cFFFF	/* 0xFFFFFFFF | 0xFFFFFFFF */
	output(	SCRTCH,	cFFFF,	Fail)

	/* XOR */

	ori	TESTID,	c0000,	6

	xor	SCRTCH,	cFFFF,	c0000	/* 0xFFFFFFFF ^ 0x00000000 */
	output(	SCRTCH,	cFFFF,	Fail)
	xor	SCRTCH,	c0000,	c0000	/* 0x00000000 ^ 0x00000000 */
	output(	SCRTCH,	c0000,	Fail)
	xor	SCRTCH,	cFFFF,	c0000	/* 0x00000000 ^ 0xFFFFFFFF */
	output(	SCRTCH,	cFFFF,	Fail)
	xor	SCRTCH,	c5555,	cFFFF	/* 0x55555555 ^ 0xFFFFFFFF */
	output(	SCRTCH,	cAAAA,	Fail)
	xor	SCRTCH,	c5555,	cAAAA	/* 0x55555555 ^ 0xAAAAAAAA */
	output(	SCRTCH,	cFFFF,	Fail)
	xor	SCRTCH,	cFFFF,	cAAAA	/* 0xFFFFFFFF ^ 0xAAAAAAAA */
	output(	SCRTCH,	c5555,	Fail)
	xor	SCRTCH,	cFFFF,	c5555	/* 0xFFFFFFFF ^ 0x55555555 */
	output(	SCRTCH,	cAAAA,	Fail)
	xor	SCRTCH,	cAAAA,	c5555	/* 0xAAAAAAAA ^ 0x55555555 */
	output(	SCRTCH,	cFFFF,	Fail)
	xor	SCRTCH,	cAAAA,	cFFFF	/* 0xAAAAAAAA ^ 0xFFFFFFFF */
	output(	SCRTCH,	c5555,	Fail)
	xor	SCRTCH,	cFFFF,	cFFFF	/* 0xFFFFFFFF ^ 0xFFFFFFFF */
	output(	SCRTCH,	c0000,	Fail)

	/* SLLV */
	/* SRLV */

	ori	TESTID,	c0000,	7

	or	CNTR1,	c0000,	c0000
	ori	CNTR2,	c0000,	0x1F
	or	ACCUM1,	c0000,	c0000
	lui	ACCUM2,	0x8000
L_SLLV:
	sllv	SCRTCH,	cFFFF,	CNTR1
	srl	SCRTCH,	SCRTCH,	31
	sllv	SCRTCH,	SCRTCH,	CNTR2
	or	ACCUM1,	ACCUM1,	SCRTCH
	srav	SCRTCH,	ACCUM2,	CNTR1
	output(	ACCUM1,	SCRTCH,	Fail)
	output(	SCRTCH,	ACCUM1,	Fail)
	addi	CNTR1,	CNTR1,	1
	bne	CNTR2,	c0000,	L_SLLV
	add	CNTR2,	CNTR2,	cFFFF

	/* GENERAL DECODING */

	ori	TESTID,	c0000,	8

	sll	ACCUM1,	cFFFF,	0x000F		/* SLL	*/
	srl	ACCUM2,	cFFFF,	0x0011		/* SRL	*/
	xor	SCRTCH,	ACCUM1,	ACCUM2
	bne	SCRTCH,	cFFFF,	Fail

	andi	ACCUM1,	c5555,	0x8000		/* ANDI	*/
	andi	ACCUM2,	c5555,	0x7FFF		/* ANDI	*/
	xor	SCRTCH,	ACCUM1,	ACCUM2
	srl	ACCUM1,	c5555,	0x0010
	bne	SCRTCH,	ACCUM1,	Fail

	sll	ACCUM1,	cFFFF,	0x0011		/* SLL	*/
	srl	ACCUM2,	cFFFF,	0x000F		/* SRL	*/
	xor	SCRTCH,	ACCUM1,	ACCUM2
	bne	SCRTCH,	cFFFF,	Fail

	ori	CNTR1,	c0000,	0x000F
	srlv	ACCUM1,	cFFFF,	CNTR1		/* SRLV	*/
	sll	ACCUM2,	cFFFF,	0x0011
	xor	SCRTCH,	ACCUM1,	ACCUM2
	bne	SCRTCH,	cFFFF,	Fail

	ori	CNTR1,	c0000,	0x0011
	srlv	ACCUM1,	cFFFF,	CNTR1		/* SRLV	*/
	sll	ACCUM2,	cFFFF,	0x000F
	xor	SCRTCH,	ACCUM1,	ACCUM2
	bne	SCRTCH,	cFFFF,	Fail

	xori	SCRTCH,	cAAAA,	0xFFFF		/* XORI	*/
	lui	ACCUM1,	0xAAAA
	ori	ACCUM1,	ACCUM1,	0x5555
	bne	SCRTCH,	ACCUM1,	Fail
	xori	SCRTCH,	cAAAA,	0x0000		/* XORI	*/
	bne	SCRTCH,	cAAAA,	Fail

	/* ------------------------- */

	ori	TESTID,	c0000,	9

	ori	ACCUM1,	c0000,	0x001

	slt	SCRTCH,	cAAAA,	c5555		/* SLT	*/
	bne	SCRTCH,	ACCUM1,	Fail
	slt	SCRTCH,	c5555,	cAAAA
	bne	SCRTCH,	c0000,	Fail

	sltu	SCRTCH,	cAAAA,	c5555		/* SLTU	*/
	bne	SCRTCH,	c0000,	Fail
	sltu	SCRTCH,	c5555,	cAAAA
	bne	SCRTCH,	ACCUM1,	Fail

	slti	SCRTCH,	cAAAA,	0xFFFE		/* SLTI	*/
	bne	SCRTCH,	ACCUM1,	Fail
	slti	SCRTCH,	c5555,	0x7FFF
	bne	SCRTCH,	c0000,	Fail
	slti	SCRTCH,	cFFFF,	0x7FFF
	bne	SCRTCH,	ACCUM1,	Fail

	sltiu	SCRTCH,	cFFFF,	0xFFFE		/* SLTIU*/
	bne	SCRTCH,	c0000,	Fail
	sltiu	SCRTCH,	cAAAA,	0xFFFF
	bne	SCRTCH,	ACCUM1,	Fail
	sltiu	SCRTCH,	c5555,	0x7FFF
	bne	SCRTCH,	c0000,	Fail

	ChkJ(	10,	j,	ACCUM1)
	ChkJAL(	11,	jal,	ACCUM1)
	ChkJALR(12,	jalr,	ACCUM1,	ACCUM2,	SCRTCH)
	ChkJR(	13,	jr,	ACCUM1,	ACCUM2)
	ChkBrWWF(14,beq,ACCUM1,ACCUM2,0x0000,0x0008,0x0000,0x0020,SCRTCH)
	ChkBrWT(15,bgez,ACCUM1,0x0000,0x0010,SCRTCH )
	ChkBrlWT(16,bgezal,ACCUM1,0x0000,0x0020,SCRTCH )
	ChkBrWT(17,bgtz,ACCUM1,0x0000,0x0080,SCRTCH )
	ChkBrWF(18,blez,ACCUM1,0x0000,0x0080,SCRTCH )
	ChkBrWF(19,bltz,ACCUM1,0x0000,0x0100,SCRTCH )
	ChkBrlWF(20,bltzal,ACCUM1,0x0000,0x0200,SCRTCH )
	ChkBrWWF(21,bne,ACCUM1,ACCUM2,0x0000,0x0800,0x0000,0x0800,SCRTCH)

	ori	TESTID,	c0000,	0xFEED

Fail:	
	output(	SCRTCH,	SCRTCH,	Fail)
	output(	ACCUM1,	ACCUM1,	Fail)
	output(	ACCUM2,	ACCUM2,	Fail)
	output(	CNTR1,	CNTR1,	Fail)
	output(	CNTR2,	CNTR2,	Fail)
	output(	MEMLOC,	MEMLOC,	Fail)

	/* DMA WRITE ISSUE SUBROUTINE */
/*	or	ACCUM1,	c0000,	c0000
	or	ACCUM2,	c0000,	c0000
	addi	MEMLOC,	MEMLOC,	0xFFFF

DmaWrite:
        mfc0    SCRTCH,	$7                      
	bne	SCRTCH,	$0,	DmaWrite	
	nop

DW_full:
	mfc0	SCRTCH,	$5			
	bne	SCRTCH,	$0,	DW_full
	nop
	mtc0	ACCUM1,	$0			
	mtc0	ACCUM2,	$1			
	mtc0	MEMLOC,	$3			

DmaDone:
	mfc0	SCRTCH,	$6			
	bne	SCRTCH,	c0000,	DmaDone
	nop

	mtc0	SCRTCH,	$7			
*/
	break