osGetIntMask.3p
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.TH osGetIntMask 3P local "Silicon Graphics, Inc."
.SH NAME
.upperok
osGetIntMask, osSetIntMask \- get, set enabled interrupt mask
.SH SYNOPSIS
.nf
\f3
.Op c
#include <ultra64.h>
.sp .8v
OSIntMask osGetIntMask(void);
.sp .8v
OSIntMask osSetIntMask(OSIntMask im);
.Op
\f1
.fi
.SH DESCRIPTION
The
.I osGetIntMask
call returns the mask of currently enabled hardware interrupts,
and the
.I osSetIntMask
call allows the application to enable and disable interrupts based on
the provided mask.
The bits of the mask are as follows.
The interrupt is enabled if the associated definition below is bitwise
OR'ed into the final mask.
.PP
.nf
.ta 5 22
OS_IM_SW1 CPU software interrupt 1
OS_IM_SW2 CPU software interrupt 2
OS_IM_CART Cartridge interrupt
OS_IM_PRENMI Pre-NMI interrupt
OS_IM_COUNTER CPU timer interrupt
OS_IM_SP RCP Signal Processor (SP) interrupt
OS_IM_SI RCP Serial Interface (SI) interrupt
OS_IM_AI RCP Audio Interface (AI) interrupt
OS_IM_VI RCP Video Interface (VI) interrupt
OS_IM_PI RCP Parallel Interface (PI) interrupt
OS_IM_DP RCP Display Processor (DP) interrupt
.sp .8v
OS_IM_NONE No interrupts enabled
OS_IM_ALL All interrupts enabled
.fi
.PP
The interrupt mask is part of the thread context and is thus saved
and restored as threads yield and regain the CPU.
All interrupts are enabled for the thread at creation time by
.IR osCreateThread (1P).
These routines are used sparingly by system threads and should not
be needed by application threads.
Instead, applications should exploit thread priorities for real time behavior
and protection of critical regions.
.SH "SEE ALSO"
.IR osSetEventMesg (3P)