Makefile
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#!smake -k -J 2
#
# This makefile has rules for making both the executables
# which make up the simulator, and for running test cases.
#
# This makefile should do a make in InData/ before making
# any test in this directory.
#
# $Revision: 1.1.1.1 $
#
COMMONPREF=RDPSIM
PRDEPTH = ../../..
include $(PRDEPTH)/PRdefs
include $(ROOT)/usr/include/make/ismcommondefs
#
# Directories
#
SIMLIB = $(PRDEPTH)/rdpsim/simlib
SRC = $(PRDEPTH)/rdpsim/src
HDR = $(PRDEPTH)/rdpsim/hdr
VERILOG =
INDATA = InData
OUTDATA = OutData/ew_all
#
# Check for objects in this directory
#
VPATH = $(SRC)
#
# Verilog Sources
#
VSRCS =
#
# C Sources
#
#
# Object Files
#
#
# Header file Directories
#
GCINCS =
#
# Linker Directories and Options
#
LLDOPTS = -L. -L$(SIMLIB)
GLDOPTS =
LLDLIBS = -lsimlib
LNFLAGS = $(CFLAGS)
#
# Test Targets
#
TESTS = $(OUTDATA)/test000.tab \
$(OUTDATA)/test001.tab \
$(OUTDATA)/test002.tab \
$(OUTDATA)/test003.tab \
$(OUTDATA)/test004.tab \
$(OUTDATA)/test005.tab \
$(OUTDATA)/test006.tab \
$(OUTDATA)/test007.tab
#
# Default Targets
#
TARGETS = test
LDIRT = *.dump *.tab *.out $(OUTDATA)/*.tab.Z OutData/*.cvg OutData/*.rgb
default install: $(TARGETS)
#
# SGI Common Rules
#
include $(PRDEPTH)/PRrules
#
# Test Targets
#
test: $(TESTS)
echo "Tests Complete"
grep "FAILED" test*.out
#
# Attribute Sync case, 1 cycle mode, edge walker dump
#
$(OUTDATA)/test000.tab: $(INDATA)/test014.att.rdp $(INDATA)/test014.att.mem.Z
testit -t 000 -b test014.att > test000.out
#
# Attribute Sync case, 2 cycle mode
#
$(OUTDATA)/test001.tab: $(INDATA)/test015.att.rdp $(INDATA)/test015.att.mem.Z
testit -t 001 -b test015.att > test001.out
#
# Attribute Sync case, Fill mode
#
$(OUTDATA)/test002.tab: $(INDATA)/test016.att.rdp $(INDATA)/test016.att.mem.Z
testit -t 002 -b test016.att > test002.out
#
# Attribute Sync case, Copy mode
#
$(OUTDATA)/test003.tab: $(INDATA)/test017.att.rdp $(INDATA)/test017.att.mem.Z
testit -t 003 -b test017.att > test003.out
#
# Interlace Case, odd field, 2 cycle mode
#
$(OUTDATA)/test004.tab: $(INDATA)/test034.tex.rdp $(INDATA)/test034.tex.mem.Z
testit -t 004 -b test034.tex > test004.out
#
# Interlace Case, even field, 2 cycle mode
#
$(OUTDATA)/test005.tab: $(INDATA)/test035.tex.rdp $(INDATA)/test035.tex.mem.Z
testit -t 005 -b test035.tex > test005.out
#
# Toggle Case, try to toggle as many internal nodes as possible
#
$(OUTDATA)/test006.tab: $(INDATA)/test040.ew.rdp $(INDATA)/test040.ew.mem.Z
testit -t 006 -b test040.ew > test006.out
#
# Large Database: AA modes, texture loads, z-buffer, interpenetration, coverage,
# etc.
#
$(OUTDATA)/test007.tab: $(INDATA)/test031.att.rdp $(INDATA)/test031.att.mem.Z
testit -t 007 -b test031.att > test007.out