disasm.h 15.6 KB
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/**************************************************************************
 *                                                                        *
 *               Copyright (C) 1994, Silicon Graphics, Inc.               *
 *                                                                        *
 *  These coded instructions, statements, and computer programs  contain  *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and  *
 *  are protected by Federal copyright  law.  They  may not be disclosed  *
 *  to  third  parties  or copied or duplicated in any form, in whole or  *
 *  in part, without the prior written consent of Silicon Graphics, Inc.  *
 *                                                                        *
 *************************************************************************/

/*
 * File:	disasm.h
 * Creator:	hsa@sgi.com
 * Create Date:	Fri Feb 11 13:00:56 PST 1994
 *
 * This file contains some constants and macros needed to dis-assemble
 * the RSP instructions.
 *
 */

#ifndef _rsp_disasm_h_
#define _rsp_disasm_h_ 1

/*
 * This is ugly. This table matches up opcode enums with constant
 * text strings for disassembly.
 */

typedef struct
{
    int		opKey;
    char	*opString;
    char	*cmdFormat;
    char	*helpString;
} rsp_disOp_t;

#define rsp_FINALOP	0xffff	/* dummy opKey value for searches */
#define rsp_FIN		0xfffe	/* dummy opKey value for searches */

/*
 * The actual table. Declared static, so should only be included
 * in one place.
 *
 * The cmdFormat field is a template field encoded thusly:
 *
 *		%s	replace with 5-bit source (or base) register
 *		%t	replace with 5-bit target register
 *		%i	replace with 16-bit immediate (or offset) value (hex)
 *		%I	replace with 16-bit immediate (or offset) value (decimal)
 *		%O	replace with 16-bit offset value (decimal)
 *		%o	replace with 16-bit offset value + base address (hex)
 *		%a	replace with 26-bit target address
 *		%d	replace with 5-bit destination register
 *		%h	replace with 5-bit shift amount
 *		%f	replace with 6-bit function code
 *		%e	replace with 3-bit element
 *		%l	replace with 3-bit (load/store) element
 *
 * A tiny parser can replace these without knowing the actual commands.
 *
 */
static rsp_disOp_t rsp_disOpTable[] =
{
    /* regular opcodes: */
    { rsp_SPECIAL,	"special",	"(SPECIAL instruction)",
	  ""},
    { rsp_REGIMM,	"regimm",	"(REGIMM instruction)",
	  ""},
    { rsp_J,		"j",		"j      %a",
	  "\t\tjump to the target address."},
    { rsp_JAL,		"jal",		"jal    %a",
	  "\t\tjump to the target address, puts PC+4 in r31."},
    { rsp_BEQ,		"beq",		"beq    $%s, $%t, %o",
	  "branch to offset, if rs == rt."},
    { rsp_BNE,		"bne",		"bne    $%s, $%t, %o",
	  "branch to offset, if rs != rt."},
    { rsp_BLEZ,		"blez",		"blez   $%s, %o",
	  "\tbranch to offset, if rs <= 0."},
    { rsp_BGTZ,		"bgtz",		"bgtz   $%s, %o",
	  "\tbranch to offset, if rs > 0."},
    { rsp_ADDI,		"addi",		"addi   $%t, $%s, %I",
	  "add immediate value to rs, put in rt."},
    { rsp_ADDIU,	"addiu",	"addiu  $%t, $%s, %I",
	  "add (unsigned) immed. value to rs, put in rt."},
    { rsp_SLTI,		"slti",		"slti   $%t, $%s, %I",
	  "set on less than immediate."},
    { rsp_SLTIU,	"sltiu",	"sltiu  $%t, $%s, %I",
	  "set on less than immediate unsigned."},
    { rsp_ANDI,		"andi",		"andi   $%t, $%s, %i",
	  "and immediate value to rs, put in rt."},
    { rsp_ORI,		"ori",		"ori    $%t, $%s, %i",
	  "or immediate value to rs, put in rt."},
    { rsp_XORI,		"xori",		"xori   $%t, $%s, %i",
	  "xor immediate value to rs, put in rt."},
    { rsp_LUI,		"lui",		"lui    $%t, %i",
	  "\tload upper immediate."},
    { rsp_COP0,		"cop0",		"(CP0 instruction)",
	  ""},
    { rsp_COP2,		"cop2",		"(VU instruction)",
	  ""},
    { rsp_LB,		"lb",		"lb     $%t, %O($%s)",
	  "load byte."},
    { rsp_LBU,		"lbu",		"lbu    $%t, %O($%s)",
	  "load byte unsigned."},
    { rsp_LH,		"lh",		"lh     $%t, %O($%s)",
	  "load halfword."},
    { rsp_LHU,		"lhu",		"lhu    $%t, %O($%s)",
	  "load halfword unsigned."},
    { rsp_LW,		"lw",		"lw     $%t, %O($%s)",
	  "load word."},
    { rsp_SB,		"sb",		"sb     $%t, %O($%s)",
	  "store byte."},
    { rsp_SH,		"sh",		"sh     $%t, %O($%s)",
	  "store halfword."},
    { rsp_SW,		"sw",		"sw     $%t, %O($%s)",
	  "store word."},
    { rsp_LWC2,		"lwc2",		"(lwc2   $v%t, %O($%s))",
	  ""},
    { rsp_SWC2,		"swc2",		"(swc2   $v%t, %O($%s))",
	  ""},

    /* SPECIAL functions: */
    { rsp_ADD,		"add",		"add    $%d, $%s, $%t",
	  "\tadd rs + rt, put in rd."},
    { rsp_ADDU,		"addu",		"addu   $%d, $%s, $%t",
	  "\tadd rs + rt, (unsigned) put in rd."},
    { rsp_SUB,		"sub",		"sub    $%d, $%s, $%t",
	  "\tsubtract rs - rt, put in rd."},
    { rsp_SUBU,		"subu",		"subu   $%d, $%s, $%t",
	  "\tsubtract rs - rt, (unsigned) put in rd."},
    { rsp_SLT,		"slt",		"slt    $%d, $%s, $%t",
	  "\tset on less than."},
    { rsp_SLTU,		"sltu",		"sltu   $%d, $%s, $%t",
	  "\tset on less than unsigned."},
    { rsp_AND,		"and",		"and    $%d, $%s, $%t",
	  "\tand rs & rt, put in rd."},
    { rsp_OR,		"or",		"or     $%d, $%s, $%t",
	  "\tor rs | rt, put in rd."},
    { rsp_XOR,		"xor",		"xor    $%d, $%s, $%t",
	  "\txor rs ^ rt, put in rd."},
    { rsp_NOR,		"nor",		"nor    $%d, $%s, $%t",
	  "\tnor rs | ~rt, put in rd."},
    { rsp_MULT,		"mult",		"mult   $%s, $%t",
	  "\t(not available in rsp)."},
    { rsp_MULTU,	"multu",	"multu  $%s, $%t",
	  "\t(not available in rsp)."},
    { rsp_DIV,		"div",		"div    $%s, $%t",
	  "\t(not available in rsp)."},
    { rsp_MFHI,		"mfhi",		"mfhi   $%d",
	  "\t\t(not available in rsp)."},
    { rsp_MTHI,		"mthi",		"mthi   $%s",
	  "\t\t(not available in rsp)."},
    { rsp_MFLO,		"mflo",		"mflo   $%d",
	  "\t\t(not available in rsp)."},
    { rsp_MTLO,		"mtlo",		"mtlo   $%s",
	  "\t\t(not available in rsp)."},
    { rsp_JR,		"jr",		"jr     $%s",
	  "\t\tjump to the address in rs."},
    { rsp_JALR,		"jalr",		"jalr   $%d, $%s",
	  "\tjump to the address in rs, link PC+4 to r31."},
    { rsp_BREAK,	"break",	"break",
	  "\t\t\tbreakpoint, halt processor."},
    { rsp_SLL,		"sll",		"sll    $%d, $%t, %h",
	  "\tshift left logical by immediate shift amount."},
    { rsp_SRL,		"srl",		"srl    $%d, $%t, %h",
	  "\tshift right logical by immediate shift amount."},
    { rsp_SRA,		"sra",		"sra    $%d, $%t, %h",
	  "\tshift right arithmetic by immediate shift amount."},
    { rsp_SLLV,		"sllv",		"sllv   $%d, $%t, $%s",
	  "\tshift left logical by amount in rs."},
    { rsp_SRLV,		"srlv",		"srlv   $%d, $%t, $%s",
	  "\tshift right logical by amount in rs."},
    { rsp_SRAV,		"srav",		"srav   $%d, $%t, $%s",
	  "\tshift right arithmetic by amount in rs."},
    { rsp_FIN,	"( end of SPECIALs )",	"", ""}, /* last, used for searching */

    /* REGIMM instructions: */
    { rsp_BLTZ,		"bltz",		"bltz   $%s, %o",
	  "\tbranch on rs < 0."},
    { rsp_BGEZ,		"bgez",		"bgez   $%s, %o",
	  "\tbranch on rs  >= 0."},
    { rsp_BLTZAL,	"bltzal",	"bltzal $%s, %o",
	  "\tbranch on rs < 0, and link PC+4 to r31."},
    { rsp_BGEZAL,	"bgezal",	"bgezal $%s, %o",
	  "\tbranch on rs >= 0, and link PC+4 to r31."},
    { rsp_FIN,	"( end of REGIMMs )",	"", ""}, /* last, used for searching */

    /* COP0 coprocessor instructions: */
    { rsp_MFC0,		"mfc0",		"mfc0   $%t, $%d",
	  "\tmove CP0 rd to rt."},
    { rsp_MTC0,		"mtc0",		"mtc0   $%t, $%d",
	  "\tmove rt to CP0 rd."},
    { rsp_BC0,		"bc0t",		"bc0t   %o",
	  "\t\t(not available in rsp)."},
    { rsp_BC0,		"bc0f",		"bc0f   %o",
	  "\t\t(not available in rsp)."},

    /* COP2 coprocessor instructions: */
    { rsp_MFC2,		"mfc2",		"mfc2   $%t, $v%d[%l]",
	  "\tmove vs to rt."},
    { rsp_CFC2,		"cfc2",		"cfc2   $%t, $%s",
	  "\tmove control vs to rt."},
    { rsp_MTC2,		"mtc2",		"mtc2   $%t, $v%d[%l]",
	  "\tmove rt to vs."},
    { rsp_CTC2,		"ctc2",		"ctc2   $%t, $%s",
	  "\tmove control rt to vs."},
    { rsp_BC,		"bc",		"(bc not used)", ""}, /* BC2T, BC2F,... */
    { rsp_FIN,	"( end of COP2s )",	"", ""}, /* last, used for searching */

    /* COP2 load instructions: */
    { rsp_LSB,		"lbv",		"lbv    $v%t[%l], %O($%s)",
	  "load byte from memory into vt[e]. (e : 0-15)"},
    { rsp_LSS,		"lsv",		"lsv    $v%t[%l], %O($%s)",
	  "load short from memory into vt[e]. (e : 0-14 by 2)"},
    { rsp_LSL,		"llv",		"llv    $v%t[%l], %O($%s)",
	  "load word from memory into vt[e]. (e : 0-12 by 4"},
    { rsp_LSD,		"ldv",		"ldv    $v%t[%l], %O($%s)",
	  "load double word from memory into vt[e]. (e : 0,8)"},
    { rsp_LSQ,		"lqv",		"lqv    $v%t[%l], %O($%s)",
	  "load quad word from memory into vt[e]. (e : 0)"},
    { rsp_LSR,		"lrv",		"lrv    $v%t[%l], %O($%s)",
	  "load rest.."},
    { rsp_LSP,		"lpv",		"lpv    $v%t[%l], %O($%s)",
	  "load packed..."},
    { rsp_LSU,		"luv",		"luv    $v%t[%l], %O($%s)",
	  "load unpack.."},
    { rsp_LSH,		"lhv",		"lhv    $v%t[%l], %O($%s)",
	  "load half.."},
    { rsp_LSF,		"lfv",		"lfv    $v%t[%l], %O($%s)",
	  "load fourth.."},
    { rsp_LSW,		"lwv",		"lwv    $v%t[%l], %O($%s)",
	  "load wrap.."},
    { rsp_LST,		"ltv",		"ltv    $v%t[%l], %O($%s)",
	  "load transpose.."},
    { rsp_FIN,	"( end of Loads )",	"", ""}, /* last, used for searching */

    /* COP2 store instructions: */
    { rsp_LSB,		"sbv",		"sbv    $v%t[%e], %O($%s)",
	  "store byte in vt[e] to memory. (e : 0-15)"},
    { rsp_LSS,		"ssv",		"ssv    $v%t[%e], %O($%s)",
	  "store short in vt[e] to memory. (e : 0-14 by 2)"},
    { rsp_LSL,		"slv",		"slv    $v%t[%e], %O($%s)",
	  "store word in vt[e] to memory. (e : 0-12 by 4)"},
    { rsp_LSD,		"sdv",		"sdv    $v%t[%e], %O($%s)",
	  "store double word in vt[e] to memory. (e : 0,8)"},
    { rsp_LSQ,		"sqv",		"sqv    $v%t[%e], %O($%s)",
	  "store quad word in vt[e] to memory. (e : 0)"},
    { rsp_LSR,		"srv",		"srv    $v%t[%e], %O($%s)",
	  "store rest..."},
    { rsp_LSP,		"spv",		"spv    $v%t[%e], %O($%s)",
	  "store packed..."},
    { rsp_LSU,		"suv",		"suv    $v%t[%e], %O($%s)",
	  "store unpack..."},
    { rsp_LSH,		"shv",		"shv    $v%t[%e], %O($%s)",
	  "store half..."},
    { rsp_LSF,		"sfv",		"sfv    $v%t[%e], %O($%s)",
	  "store fourth..."},
    { rsp_LSW,		"swv",		"swv    $v%t[%e], %O($%s)",
	  "store wrap..."},
    { rsp_LST,		"stv",		"stv    $v%t[%e], %O($%s)",
	  "store transpose..."},
    { rsp_FIN,	"( end of Stores )",	"", ""}, /* last, used for searching */

    /* VU operation instructions: (COP2) */
    /* most of these operation instructions could have an element field */
    /* for the $vt register if bit 24 is true, which will look like $vt[e] */

    /* multiply instructions: */
    { rsp_VMULF,	"vmulf",	"vmulf  $v%d, $v%s, $v%t",
	  "vector (frac) multiply."},
    { rsp_VMACF,	"vmacf",	"vmacf  $v%d, $v%s, $v%t",
	  "vector (frac) multiply accumulate."},
    { rsp_VMULU,	"vmulu",	"vmulu  $v%d, $v%s, $v%t",
	  "vector (uns. frac) multiply."},
    { rsp_VMACU,	"vmacu",	"vmacu  $v%d, $v%s, $v%t",
	  "vector (uns. frac) multiply accumulate."},
    { rsp_VRNDP,	"vrndp",	"vrndp  $v%d, $v%s, $v%t",
	  "vector DCT round (+)."},
    { rsp_VRNDN,	"vrndn",	"vrndn  $v%d, $v%s, $v%t",
	  "vector DCT round (-)."},
    { rsp_VMULQ,	"vmulq",	"vmulq  $v%d, $v%s, $v%t",
	  "vector (int) multiply."},
    { rsp_VMACQ,	"vmacq",	"vmacq  $v%d, $v%s, $v%t",
	  "vector (int) multiply accumulate."},
    { rsp_VMUDH,	"vmudh",	"vmudh  $v%d, $v%s, $v%t",
	  "vector (high) multiply."},
    { rsp_VMADH,	"vmadh",	"vmadh  $v%d, $v%s, $v%t",
	  "vector (high) multiply accumulate."},
    { rsp_VMUDM,	"vmudm",	"vmudm  $v%d, $v%s, $v%t",
	  "vector (mid-m) multiply."},
    { rsp_VMADM,	"vmadm",	"vmadm  $v%d, $v%s, $v%t",
	  "vector (mid-m) multiply accumulate."},
    { rsp_VMUDN,	"vmudn",	"vmudn  $v%d, $v%s, $v%t",
	  "vector (mid-n) multiply."},
    { rsp_VMADN,	"vmadn",	"vmadn  $v%d, $v%s, $v%t",
	  "vector (mid-n) multiply accumulate."},
    { rsp_VMUDL,	"vmudl",	"vmudl  $v%d, $v%s, $v%t",
	  "vector (low) multiply."},
    { rsp_VMADL,	"vmadl",	"vmadl  $v%d, $v%s, $v%t",
	  "vector (low) multiply accumulate."},

    /* add instructions: */
    { rsp_VADD,		"vadd",		"vadd   $v%d, $v%s, $v%t",
	  "vector add."},
    { rsp_VSUB,		"vsub",		"vsub   $v%d, $v%s, $v%t",
	  "vector sub."},
    { rsp_VSUT,		"vsut",		"vsut   $v%d, $v%s, $v%t",
	  "vector sut (vt - vs)."},
    { rsp_VABS,		"vabs",		"vabs   $v%d, $v%s, $v%t",
	  "vector abs."},
    { rsp_VADDC,	"vaddc",	"vaddc  $v%d, $v%s, $v%t",
	  "vector addc."},
    { rsp_VSUBC,	"vsubc",	"vsubc  $v%d, $v%s, $v%t",
	  "vector subc."},
    { rsp_VADDB,	"vaddb",	"vaddb  $v%d, $v%s, $v%t",
	  "vector add byte."},
    { rsp_VSUBB,	"vsubb",	"vsubb  $v%d, $v%s, $v%t",
	  "vector sub byte."},
    { rsp_VACCB,	"vaccb",	"vaccb  $v%d, $v%s, $v%t",
	  "vector add byte/add acc."},
    { rsp_VSUCB,	"vsucb",	"vsucb  $v%d, $v%s, $v%t",
	  "vector sub byte/add acc."},
    { rsp_VSAD,		"vsad",		"vsad   $v%d, $v%s, $v%t",
	  "vector sad..."},
    { rsp_VSAC,		"vsac",		"vsac   $v%d, $v%s, $v%t",
	  "vector sac..."},
    { rsp_VSUM,		"vsum",		"vsum   $v%d, $v%s, $v%t",
	  "vector sum..."},
    { rsp_VSAW,		"vsaw",		"vsaw   $v%d, $v%s, $v%t",
	  "vector sum..."},

    /* select instructions: */
    { rsp_VLT,		"vlt",		"vlt    $v%d, $v%s, $v%t",
	  "vector select, <."},
    { rsp_VEQ,		"veq",		"veq    $v%d, $v%s, $v%t",
	  "vector select, ==."},
    { rsp_VNE,		"vne",		"vne    $v%d, $v%s, $v%t",
	  "vector select, !=."},
    { rsp_VGE,		"vge",		"vge    $v%d, $v%s, $v%t",
	  "vector select, >=."},
    { rsp_VCL,		"vcl",		"vcl    $v%d, $v%s, $v%t",
	  "vector select, clip low."},
    { rsp_VCH,		"vch",		"vch    $v%d, $v%s, $v%t",
	  "vector select, clip high."},
    { rsp_VCR,		"vcr",		"vcr    $v%d, $v%s, $v%t",
	  "vector select, 1's comp clip."},
    { rsp_VMRG,		"vmrg",		"vmrg   $v%d, $v%s, $v%t",
	  "vector select, merge."},

    /* logical instructions: */
    { rsp_VAND,		"vand",		"vand   $v%d, $v%s, $v%t",
	  "vector logical op, and."},
    { rsp_VNAND,	"vnand",	"vnand  $v%d, $v%s, $v%t",
	  "vector logical op, nand."},
    { rsp_VOR,		"vor",		"vor    $v%d, $v%s, $v%t",
	  "vector logical op, or."},
    { rsp_VNOR,		"vnor",		"vnor   $v%d, $v%s, $v%t",
	  "vector logical op, nor."},
    { rsp_VXOR,		"vxor",		"vxor   $v%d, $v%s, $v%t",
	  "vector logical op, xor."},
    { rsp_VNXOR,	"vnxor",	"vnxor  $v%d, $v%s, $v%t",
	  "vector logical op, nxor."},

    /* divide instructions: */
    { rsp_VNOP,	"vnop",	"vnop  ",
	  "\t\tvector no-op."},
    { rsp_VMOV,		"vmov",		"vmov   $v%d[%s], $v%t",
	  "vector scalar-element move."},
    { rsp_VRCP,		"vrcp",		"vrcp   $v%d[%s], $v%t",
	  "single precision, lookup source, write result."},
    { rsp_VRSQ,		"vrsq",		"vrsq   $v%d[%s], $v%t",
	  "single precision, lookup source, write result."},
    { rsp_VRCPH,	"vrcph",	"vrcph  $v%d[%s], $v%t",
	  "set source, write previous result."},
    { rsp_VRSQH,	"vrsqh",	"vrsqh  $v%d[%s], $v%t",
	  "set source, write previous result."},
    { rsp_VRCPL,	"vrcpl",	"vrcpl  $v%d[%s], $v%t",
	  "lookup source and previous, write result."},
    { rsp_VRSQL,	"vrsql",	"vrsql  $v%d[%s], $v%t",
	  "lookup source and previous, write result."},

    /* pack instructions: */
    { rsp_VINST,	"vinst",	"vinst  $v%d, $v%s, $v%t[%e]",
	  "vector insert triple (5/5/5/1)."},
    { rsp_VEXTT,	"vextt",	"vextt  $v%d, $v%s, $v%t[%e]",
	  "vector extract triple (5/5/5/1)."},
    { rsp_VINSQ,	"vinsq",	"vinsq  $v%d, $v%s, $v%t[%e]",
	  "vector insert quad (4/4/4/4)."},
    { rsp_VEXTQ,	"vextq",	"vextq  $v%d, $v%s, $v%t[%e]",
	  "vector extract quad (4/4/4/4)."},
    { rsp_VINSN,	"vinsn",	"vinsn  $v%d, $v%s, $v%t[%e]",
	  "vector insert nibble (4/4/4/4) sign-extend."},
    { rsp_VEXTN,	"vextn",	"vextn  $v%d, $v%s, $v%t[%e]",
	  "vector extract nibble (4/4/4/4) sign-extend."},
    { rsp_FIN,	"( end of Vector Insts )",	"", ""}, /* last, used for searching */

    { rsp_FINALOP,	"placebo",	"", ""}, /* last, used for searching */
};

/*
 * dis-assemble an instruction and return a readable string
 * in the buffer 'buf'
 */
extern void	rsp_DisasmInst(u32 inst, char *buf, int pc);

#endif