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/************************************************************************
DMA MIXED READ/WRITE TESTS: File #0
************************************************************************/
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/****************************************************************
DMA TEST #0.1
****************************************************************/
ori $1, $0, 0x0001 /* R1 = TEST ID */
Wait1: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait1
ori $10, $0, 0x0000 /* DMA read #0 */
lui $11, 0x0000
ori $11, $11, 0x2000
ori $12, $0, 0x0107
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.2
****************************************************************/
ori $1, $0, 0x0002 /* R1 = TEST ID */
Wait2: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait2
ori $10, $0, 0x0100 /* DMA read #1 */
lui $11, 0x0000
ori $11, $11, 0x2100
ori $12, $0, 0x00EF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.3
****************************************************************/
ori $1, $0, 0x0003 /* R1 = TEST ID */
Wait3: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait3
ori $10, $0, 0x0000 /* DMA write #0 */
lui $11, 0x0000
ori $11, $11, 0x2000
lui $13, 0x0000
ori $13, $13, 0x0107
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.4
****************************************************************/
ori $1, $0, 0x0004 /* R1 = TEST ID */
Wait4: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait4
ori $10, $0, 0x0100 /* DMA write #1 */
lui $11, 0x0000
ori $11, $11, 0x2100
lui $13, 0x0000
ori $13, $13, 0x00EF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.5
****************************************************************/
ori $1, $0, 0x0005 /* R1 = TEST ID */
Wait5: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait5
ori $10, $0, 0x01E8 /* DMA read #2 */
lui $11, 0x0000
ori $11, $11, 0x21E8
ori $12, $0, 0x00E7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.6
****************************************************************/
ori $1, $0, 0x0006 /* R1 = TEST ID */
Wait6: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait6
ori $10, $0, 0x02C8 /* DMA read #3 */
lui $11, 0x0000
ori $11, $11, 0x22C8
ori $12, $0, 0x00CF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.7
****************************************************************/
ori $1, $0, 0x0007 /* R1 = TEST ID */
Wait7: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait7
ori $10, $0, 0x01E8 /* DMA write #2 */
lui $11, 0x0000
ori $11, $11, 0x21E8
lui $13, 0x0000
ori $13, $13, 0x00E7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.8
****************************************************************/
ori $1, $0, 0x0008 /* R1 = TEST ID */
Wait8: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait8
ori $10, $0, 0x02C8 /* DMA write #3 */
lui $11, 0x0000
ori $11, $11, 0x22C8
lui $13, 0x0000
ori $13, $13, 0x00CF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.9
****************************************************************/
ori $1, $0, 0x0009 /* R1 = TEST ID */
Wait9: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait9
ori $10, $0, 0x0390 /* DMA read #4 */
lui $11, 0x0000
ori $11, $11, 0x2390
ori $12, $0, 0x00C7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.10
****************************************************************/
ori $1, $0, 0x000A /* R1 = TEST ID */
Wait10: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait10
ori $10, $0, 0x0450 /* DMA read #5 */
lui $11, 0x0000
ori $11, $11, 0x2450
ori $12, $0, 0x00AF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.11
****************************************************************/
ori $1, $0, 0x000B /* R1 = TEST ID */
Wait11: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait11
ori $10, $0, 0x0390 /* DMA write #4 */
lui $11, 0x0000
ori $11, $11, 0x2390
lui $13, 0x0000
ori $13, $13, 0x00C7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.12
****************************************************************/
ori $1, $0, 0x000C /* R1 = TEST ID */
Wait12: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait12
ori $10, $0, 0x0450 /* DMA write #5 */
lui $11, 0x0000
ori $11, $11, 0x2450
lui $13, 0x0000
ori $13, $13, 0x00AF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.13
****************************************************************/
ori $1, $0, 0x000D /* R1 = TEST ID */
Wait13: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait13
ori $10, $0, 0x04F8 /* DMA read #6 */
lui $11, 0x0000
ori $11, $11, 0x24F8
ori $12, $0, 0x00A7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.14
****************************************************************/
ori $1, $0, 0x000E /* R1 = TEST ID */
Wait14: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait14
ori $10, $0, 0x0598 /* DMA read #7 */
lui $11, 0x0000
ori $11, $11, 0x2598
ori $12, $0, 0x008F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.15
****************************************************************/
ori $1, $0, 0x000F /* R1 = TEST ID */
Wait15: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait15
ori $10, $0, 0x04F8 /* DMA write #6 */
lui $11, 0x0000
ori $11, $11, 0x24F8
lui $13, 0x0000
ori $13, $13, 0x00A7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.16
****************************************************************/
ori $1, $0, 0x0010 /* R1 = TEST ID */
Wait16: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait16
ori $10, $0, 0x0598 /* DMA write #7 */
lui $11, 0x0000
ori $11, $11, 0x2598
lui $13, 0x0000
ori $13, $13, 0x008F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.17
****************************************************************/
ori $1, $0, 0x0011 /* R1 = TEST ID */
Wait17: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait17
ori $10, $0, 0x0620 /* DMA read #8 */
lui $11, 0x0000
ori $11, $11, 0x2620
ori $12, $0, 0x0087
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.18
****************************************************************/
ori $1, $0, 0x0012 /* R1 = TEST ID */
Wait18: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait18
ori $10, $0, 0x06A0 /* DMA read #9 */
lui $11, 0x0000
ori $11, $11, 0x26A0
ori $12, $0, 0x006F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.19
****************************************************************/
ori $1, $0, 0x0013 /* R1 = TEST ID */
Wait19: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait19
ori $10, $0, 0x0620 /* DMA write #8 */
lui $11, 0x0000
ori $11, $11, 0x2620
lui $13, 0x0000
ori $13, $13, 0x0087
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.20
****************************************************************/
ori $1, $0, 0x0014 /* R1 = TEST ID */
Wait20: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait20
ori $10, $0, 0x06A0 /* DMA write #9 */
lui $11, 0x0000
ori $11, $11, 0x26A0
lui $13, 0x0000
ori $13, $13, 0x006F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.21
****************************************************************/
ori $1, $0, 0x0015 /* R1 = TEST ID */
Wait21: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait21
ori $10, $0, 0x0708 /* DMA read #10 */
lui $11, 0x0000
ori $11, $11, 0x2708
ori $12, $0, 0x0067
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.22
****************************************************************/
ori $1, $0, 0x0016 /* R1 = TEST ID */
Wait22: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait22
ori $10, $0, 0x0768 /* DMA read #11 */
lui $11, 0x0000
ori $11, $11, 0x2768
ori $12, $0, 0x004F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.23
****************************************************************/
ori $1, $0, 0x0017 /* R1 = TEST ID */
Wait23: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait23
ori $10, $0, 0x0708 /* DMA write #10 */
lui $11, 0x0000
ori $11, $11, 0x2708
lui $13, 0x0000
ori $13, $13, 0x0067
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.24
****************************************************************/
ori $1, $0, 0x0018 /* R1 = TEST ID */
Wait24: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait24
ori $10, $0, 0x0768 /* DMA write #11 */
lui $11, 0x0000
ori $11, $11, 0x2768
lui $13, 0x0000
ori $13, $13, 0x004F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.25
****************************************************************/
ori $1, $0, 0x0019 /* R1 = TEST ID */
Wait25: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait25
ori $10, $0, 0x07B0 /* DMA read #12 */
lui $11, 0x0000
ori $11, $11, 0x27B0
ori $12, $0, 0x0027
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.26
****************************************************************/
ori $1, $0, 0x001A /* R1 = TEST ID */
Wait26: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait26
ori $10, $0, 0x07D0 /* DMA read #13 */
lui $11, 0x0000
ori $11, $11, 0x27D0
ori $12, $0, 0x001F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.27
****************************************************************/
ori $1, $0, 0x001B /* R1 = TEST ID */
Wait27: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait27
ori $10, $0, 0x07B0 /* DMA write #12 */
lui $11, 0x0000
ori $11, $11, 0x27B0
lui $13, 0x0000
ori $13, $13, 0x0027
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.28
****************************************************************/
ori $1, $0, 0x001C /* R1 = TEST ID */
Wait28: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait28
ori $10, $0, 0x07D0 /* DMA write #13 */
lui $11, 0x0000
ori $11, $11, 0x27D0
lui $13, 0x0000
ori $13, $13, 0x001F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.29
****************************************************************/
ori $1, $0, 0x001D /* R1 = TEST ID */
Wait29: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait29
ori $10, $0, 0x07E8 /* DMA read #14 */
lui $11, 0x0000
ori $11, $11, 0x27E8
ori $12, $0, 0x0017
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.30
****************************************************************/
ori $1, $0, 0x001E /* R1 = TEST ID */
Wait30: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait30
ori $10, $0, 0x07F8 /* DMA read #15 */
lui $11, 0x0000
ori $11, $11, 0x27F8
ori $12, $0, 0x000F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.31
****************************************************************/
ori $1, $0, 0x001F /* R1 = TEST ID */
Wait31: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait31
ori $10, $0, 0x07E8 /* DMA write #14 */
lui $11, 0x0000
ori $11, $11, 0x27E8
lui $13, 0x0000
ori $13, $13, 0x0017
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.32
****************************************************************/
ori $1, $0, 0x0020 /* R1 = TEST ID */
Wait32: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait32
ori $10, $0, 0x07F8 /* DMA write #15 */
lui $11, 0x0000
ori $11, $11, 0x27F8
lui $13, 0x0000
ori $13, $13, 0x000F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.33
****************************************************************/
ori $1, $0, 0x0021 /* R1 = TEST ID */
Wait33: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait33
ori $10, $0, 0x0800 /* DMA read #16 */
lui $11, 0x0000
ori $11, $11, 0x2800
ori $12, $0, 0x0007
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.34
****************************************************************/
ori $1, $0, 0x0022 /* R1 = TEST ID */
Wait34: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait34
ori $10, $0, 0x0800 /* DMA read #17 */
lui $11, 0x0000
ori $11, $11, 0x2800
ori $12, $0, 0x000F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.35
****************************************************************/
ori $1, $0, 0x0023 /* R1 = TEST ID */
Wait35: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait35
ori $10, $0, 0x0800 /* DMA write #16 */
lui $11, 0x0000
ori $11, $11, 0x2800
lui $13, 0x0000
ori $13, $13, 0x0007
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.36
****************************************************************/
ori $1, $0, 0x0024 /* R1 = TEST ID */
Wait36: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait36
ori $10, $0, 0x0800 /* DMA write #17 */
lui $11, 0x0000
ori $11, $11, 0x2800
lui $13, 0x0000
ori $13, $13, 0x000F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.37
****************************************************************/
ori $1, $0, 0x0025 /* R1 = TEST ID */
Wait37: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait37
ori $10, $0, 0x0808 /* DMA read #18 */
lui $11, 0x0000
ori $11, $11, 0x2808
ori $12, $0, 0x0017
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.38
****************************************************************/
ori $1, $0, 0x0026 /* R1 = TEST ID */
Wait38: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait38
ori $10, $0, 0x0818 /* DMA read #19 */
lui $11, 0x0000
ori $11, $11, 0x2818
ori $12, $0, 0x001F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.39
****************************************************************/
ori $1, $0, 0x0027 /* R1 = TEST ID */
Wait39: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait39
ori $10, $0, 0x0808 /* DMA write #18 */
lui $11, 0x0000
ori $11, $11, 0x2808
lui $13, 0x0000
ori $13, $13, 0x0017
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.40
****************************************************************/
ori $1, $0, 0x0028 /* R1 = TEST ID */
Wait40: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait40
ori $10, $0, 0x0818 /* DMA write #19 */
lui $11, 0x0000
ori $11, $11, 0x2818
lui $13, 0x0000
ori $13, $13, 0x001F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.41
****************************************************************/
ori $1, $0, 0x0029 /* R1 = TEST ID */
Wait41: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait41
ori $10, $0, 0x0830 /* DMA read #20 */
lui $11, 0x0000
ori $11, $11, 0x2830
ori $12, $0, 0x0027
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.42
****************************************************************/
ori $1, $0, 0x002A /* R1 = TEST ID */
Wait42: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait42
ori $10, $0, 0x0850 /* DMA read #21 */
lui $11, 0x0000
ori $11, $11, 0x2850
ori $12, $0, 0x0057
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.43
****************************************************************/
ori $1, $0, 0x002B /* R1 = TEST ID */
Wait43: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait43
ori $10, $0, 0x0830 /* DMA write #20 */
lui $11, 0x0000
ori $11, $11, 0x2830
lui $13, 0x0000
ori $13, $13, 0x0027
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.44
****************************************************************/
ori $1, $0, 0x002C /* R1 = TEST ID */
Wait44: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait44
ori $10, $0, 0x0850 /* DMA write #21 */
lui $11, 0x0000
ori $11, $11, 0x2850
lui $13, 0x0000
ori $13, $13, 0x0057
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.45
****************************************************************/
ori $1, $0, 0x002D /* R1 = TEST ID */
Wait45: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait45
ori $10, $0, 0x08A0 /* DMA read #22 */
lui $11, 0x0000
ori $11, $11, 0x28A0
ori $12, $0, 0x005F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.46
****************************************************************/
ori $1, $0, 0x002E /* R1 = TEST ID */
Wait46: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait46
ori $10, $0, 0x08F8 /* DMA read #23 */
lui $11, 0x0000
ori $11, $11, 0x28F8
ori $12, $0, 0x0077
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.47
****************************************************************/
ori $1, $0, 0x002F /* R1 = TEST ID */
Wait47: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait47
ori $10, $0, 0x08A0 /* DMA write #22 */
lui $11, 0x0000
ori $11, $11, 0x28A0
lui $13, 0x0000
ori $13, $13, 0x005F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.48
****************************************************************/
ori $1, $0, 0x0030 /* R1 = TEST ID */
Wait48: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait48
ori $10, $0, 0x08F8 /* DMA write #23 */
lui $11, 0x0000
ori $11, $11, 0x28F8
lui $13, 0x0000
ori $13, $13, 0x0077
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.49
****************************************************************/
ori $1, $0, 0x0031 /* R1 = TEST ID */
Wait49: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait49
ori $10, $0, 0x0968 /* DMA read #24 */
lui $11, 0x0000
ori $11, $11, 0x2968
ori $12, $0, 0x007F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.50
****************************************************************/
ori $1, $0, 0x0032 /* R1 = TEST ID */
Wait50: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait50
ori $10, $0, 0x09E0 /* DMA read #25 */
lui $11, 0x0000
ori $11, $11, 0x29E0
ori $12, $0, 0x0097
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.51
****************************************************************/
ori $1, $0, 0x0033 /* R1 = TEST ID */
Wait51: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait51
ori $10, $0, 0x0968 /* DMA write #24 */
lui $11, 0x0000
ori $11, $11, 0x2968
lui $13, 0x0000
ori $13, $13, 0x007F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.52
****************************************************************/
ori $1, $0, 0x0034 /* R1 = TEST ID */
Wait52: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait52
ori $10, $0, 0x09E0 /* DMA write #25 */
lui $11, 0x0000
ori $11, $11, 0x29E0
lui $13, 0x0000
ori $13, $13, 0x0097
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.53
****************************************************************/
ori $1, $0, 0x0035 /* R1 = TEST ID */
Wait53: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait53
ori $10, $0, 0x0A70 /* DMA read #26 */
lui $11, 0x0000
ori $11, $11, 0x2A70
ori $12, $0, 0x009F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.54
****************************************************************/
ori $1, $0, 0x0036 /* R1 = TEST ID */
Wait54: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait54
ori $10, $0, 0x0B08 /* DMA read #27 */
lui $11, 0x0000
ori $11, $11, 0x2B08
ori $12, $0, 0x00B7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.55
****************************************************************/
ori $1, $0, 0x0037 /* R1 = TEST ID */
Wait55: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait55
ori $10, $0, 0x0A70 /* DMA write #26 */
lui $11, 0x0000
ori $11, $11, 0x2A70
lui $13, 0x0000
ori $13, $13, 0x009F
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.56
****************************************************************/
ori $1, $0, 0x0038 /* R1 = TEST ID */
Wait56: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait56
ori $10, $0, 0x0B08 /* DMA write #27 */
lui $11, 0x0000
ori $11, $11, 0x2B08
lui $13, 0x0000
ori $13, $13, 0x00B7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.57
****************************************************************/
ori $1, $0, 0x0039 /* R1 = TEST ID */
Wait57: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait57
ori $10, $0, 0x0BB8 /* DMA read #28 */
lui $11, 0x0000
ori $11, $11, 0x2BB8
ori $12, $0, 0x00BF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.58
****************************************************************/
ori $1, $0, 0x003A /* R1 = TEST ID */
Wait58: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait58
ori $10, $0, 0x0C70 /* DMA read #29 */
lui $11, 0x0000
ori $11, $11, 0x2C70
ori $12, $0, 0x00D7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.59
****************************************************************/
ori $1, $0, 0x003B /* R1 = TEST ID */
Wait59: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait59
ori $10, $0, 0x0BB8 /* DMA write #28 */
lui $11, 0x0000
ori $11, $11, 0x2BB8
lui $13, 0x0000
ori $13, $13, 0x00BF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.60
****************************************************************/
ori $1, $0, 0x003C /* R1 = TEST ID */
Wait60: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait60
ori $10, $0, 0x0C70 /* DMA write #29 */
lui $11, 0x0000
ori $11, $11, 0x2C70
lui $13, 0x0000
ori $13, $13, 0x00D7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.61
****************************************************************/
ori $1, $0, 0x003D /* R1 = TEST ID */
Wait61: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait61
ori $10, $0, 0x0D40 /* DMA read #30 */
lui $11, 0x0000
ori $11, $11, 0x2D40
ori $12, $0, 0x00DF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.62
****************************************************************/
ori $1, $0, 0x003E /* R1 = TEST ID */
Wait62: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait62
ori $10, $0, 0x0E18 /* DMA read #31 */
lui $11, 0x0000
ori $11, $11, 0x2E18
ori $12, $0, 0x00F7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.63
****************************************************************/
ori $1, $0, 0x003F /* R1 = TEST ID */
Wait63: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait63
ori $10, $0, 0x0D40 /* DMA write #30 */
lui $11, 0x0000
ori $11, $11, 0x2D40
lui $13, 0x0000
ori $13, $13, 0x00DF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.64
****************************************************************/
ori $1, $0, 0x0040 /* R1 = TEST ID */
Wait64: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait64
ori $10, $0, 0x0E18 /* DMA write #31 */
lui $11, 0x0000
ori $11, $11, 0x2E18
lui $13, 0x0000
ori $13, $13, 0x00F7
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.65
****************************************************************/
ori $1, $0, 0x0041 /* R1 = TEST ID */
Wait65: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait65
ori $10, $0, 0x0F00 /* DMA read #32 */
lui $11, 0x0000
ori $11, $11, 0x2F00
ori $12, $0, 0x00FF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
/****************************************************************
DMA TEST #0.66
****************************************************************/
ori $1, $0, 0x0042 /* R1 = TEST ID */
Wait66: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait66
ori $10, $0, 0x0F00 /* DMA write #32 */
lui $11, 0x0000
ori $11, $11, 0x2F00
lui $13, 0x0000
ori $13, $13, 0x00FF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $13, $3
/****************************************************************
DMA TEST #0.67
****************************************************************/
ori $1, $0, 0x0043 /* R1 = TEST ID */
Wait67: mfc0 $14, $4 /* check if DMA full */
andi $15, $14, 0x0008
bne $15, $0, Wait67
Flush67: mfc0 $14, $4 /* check if DMA done */
andi $15, $14, 0x0004
bne $15, $0, Flush67
ori $2, $0, 0x0004 /* Chk resulting DMEM */
ori $4, $0, 0x2FFC /* R4 = expected data */
ori $6, $0, 0x0FFC /* R6 = DMEM chk addr */
Chk67: lw $5, 0x0000 ($6)
bne $5, $4, Fail
sub $6, $6, $2
bne $6, $0, Chk67
sub $4, $4, $2
ori $10, $0, 0x0000 /* Check RDRAM */
lui $11, 0x0000
ori $11, $11, 0x2000
ori $12, $0, 0x0FFF
mtc0 $10, $0
mtc0 $11, $1
mtc0 $12, $2
Dram67: mfc0 $14, $4 /* check if DMA done */
andi $15, $14, 0x0004
bne $15, $0, Dram67
ori $4, $0, 0x2FFC
ori $6, $0, 0x0FFC
Chk267: lw $5, 0x0000 ($6)
bne $5, $4, Fail
sub $6, $6, $2
bne $6, $0, Chk267
sub $4, $4, $2
/****************************************************************
Wrap up ...
****************************************************************/
nop
Done: ori $1, $0, 0xFEED /* Test passed */
break
Time: ori $1, $0, 0xDEAD /* Timed-out from DMA */
break
Fail: break