`timescale 1ns/1ns

module GCB_DMFF (q, qn, da, db, sa, sb, cp, sdn, cdn);
   input da, db, sa, sb, cp, sdn, cdn;
   output q, qn;
   reg tq;

   assign qn = (!sdn && !cdn) ? 1'b0 : ~q;
   assign q = (sdn && cdn) ? tq : (!sdn && cdn) ? 1'b1 : 1'b0;
   always @ (posedge cp)
      if (!sa && !sb)
         tq <= 1'b0;
      else if (!sa && sb)
         tq <= #1 db;
      else if (sa && !sb)
         tq <= #1 da;
      else if (sa && sb)
         tq <= #1 (da | db);

endmodule