// $Id: j_mx81.v,v 1.1 2002/09/30 23:10:57 jeff Exp $

module j_mx81 (z, i0, i1, i2, i3, i4, i5, i6, i7, s0, s1, s2);
   input i0, i1, i2, i3, i4, i5, i6, i7, s0, s1, s2;
   output z;

    reg z;
    always @(i0 or i1 or i2 or i3 or i4 or i5 or i6 or i7 or s0 or s1 or s2)
       case ({s2,s1,s0})
           3'b000: z = i0;
           3'b001: z = i1;
           3'b010: z = i2;
           3'b011: z = i3;
           3'b100: z = i4;
           3'b101: z = i5;
           3'b110: z = i6;
           3'b111: z = i7;
       endcase

endmodule