module pbus_mon(ad16_aleh, ad16_alel, ad16_read, ad16_write, ad16_data);

`include "rcp.vh"

input ad16_aleh;
input ad16_alel;
input ad16_read;
input ad16_write;
input [AD16_DATA_SIZE-1:0] ad16_data;

reg [AD16_DATA_SIZE-1:0] address_high, address_low;

reg monitor_enable;
initial monitor_enable = $test$plusargs("pbus_mon");

always @(negedge ad16_aleh) begin
    if (monitor_enable) begin
        if (ad16_alel) begin
            $display(`CLOCK_COUNT, " : pbus   latch high address - %h",
                      ad16_data);
            address_high = ad16_data;
            end
        end
    end

always @(negedge ad16_alel) begin
    if (monitor_enable) begin
        if (!ad16_aleh) begin
            $display(`CLOCK_COUNT, " : pbus   latch low address  - %h",
                      ad16_data);
            address_low = ad16_data;
            end
        end
    end

always @(posedge ad16_read) begin
    if (monitor_enable) begin
        if (!ad16_aleh && !ad16_alel) begin
            $display(`CLOCK_COUNT, " : pbus   read data          - %h@%h",
                      ad16_data, {address_high, address_low});
            {address_high, address_low} = {address_high, address_low} + 2;
            end
        end
    end

always @(posedge ad16_write) begin
    if (monitor_enable) begin
        if (!ad16_aleh && !ad16_alel) begin
            $display(`CLOCK_COUNT, " : pbus   write data         - %h@%h",
                      ad16_data, {address_high, address_low});
            {address_high, address_low} = {address_high, address_low} + 2;
            end
        end
    end

endmodule